19 results about "Network processing unit" patented technology

The present disclosure provides a storage processing method, related devices and media. The method comprises: in response to receiving a new session packet of a network session, determining session table information corresponding to the new session packet; determining a target processing unit relied on by the network session from among programmable network processing units and non-programmable network processing units according to a session index of the network session; storing the session table information into a session storage space according to a preset storage rule, updating a space occupancy rate of the target processing unit in the session storage space; detecting a hardware state and the space occupancy rate of the target processing unit to obtain a first detection result; and in response to the first detection result indicating that the target processing unit is abnormal, reallocating storage resources occupied by the target processing unit in the session storage space. The present disclosure can achieve flexible and efficient utilization of storage resources of the session storage space. The present disclosure can be applied to various scenarios such as databases, artificial intelligence, cloud technology, etc.

This invention discloses an automated sorting robot system based on an embedded vision module, belonging to the field of computer vision technology. Its features include: an image acquisition module for acquiring image information of workpieces to be sorted, comprising at least two cameras and two lasers emitting parallel laser lines to form a binocular structured light ranging field; an embedded main control module electrically connected to the image acquisition module, comprising a neural network processing unit (NPU), a model inference unit, a depth calculation unit, and a coordinate transformation unit; a sorting execution module communicatively connected to the embedded main control module for performing gripping and placement operations based on the workpiece's three-dimensional coordinates and dimensions output by the embedded main control module; and a central server module connected to several embedded main control modules via an industrial Ethernet or message queue communication protocol.

A scheduling controller and method for neural network processing unit are disclosed. The neural network processing unit is used for running a neural network model and comprises multiple cores and each core comprises multiple processing elements (PEs). The scheduling controller comprises a top level module including a top RISC-V CPU with Vector extension (RVV) and a chip level scheduler (ChLS), a core level module including a core RVV and a core level scheduler (CoLS), and a PE level module including a PE RVV and a PE level scheduler (PELS).

The application provides a multi-path data processing method, a real display device, equipment, a medium and a product. Pre-set row data output by at least two image signal processors is acquired, and the pre-set row data output by the at least two image signal processors is processed in parallel through network reasoning. The demand for image segmentation processing of the whole image is cancelled to improve the accuracy of image processing, and the requirement for the overall computing power and data cache space of the system is reduced. In addition, the pre-set row data output by at least part of the image signal is divided into multiple pieces, and network reasoning is performed on each piece of data according to a pre-set strategy. The pre-set strategy is that the mobile terminal starts from a first end, moves to a second opposite end, returns to the first end after reaching the second end, and continues until the piece data reasoning is completed. In this way, the memory overhead of the neural network processing unit is reduced, the ability of a single neural network processing unit to process multiple paths of image data in parallel is improved, high frame rate and high resolution are supported, and network reasoning delay is reduced.

The disclosure provides a heterogeneous computing scheduling method, system, device and storage medium, and relates to the technical field of artificial intelligence. In some embodiments of the disclosure, according to the task descriptor, the page table mapping relationship of the input-output memory management unit is configured without the participation of the system core, and address translation preprocessing is completed; the virtual address interval accessed subsequently by the neural network processing unit is predicted; before the neural network processing unit initiates a memory access request, according to the virtual address interval, the page table hardware traversal of the input-output memory management unit is triggered, the page table entry is obtained, and the page table entry is loaded into the input-output conversion buffer; a start signal is sent to the neural network processing unit, so that the neural network processing unit accesses the shared main memory through the input-output memory management unit based on the page table mapping relationship. Through the dual-core division of the system core and the control core, the system overhead caused by the participation of the operating system in the underlying scheduling is reduced, and the additional power consumption overhead is reduced.

Embodiments of the present application relate to the technical field of computer, and disclose a compiling method and device and electronic equipment. The method comprises: an NPU (Neural Network Processing Unit) compiler performing compiling on an initial computation graph of a target NPU through static analysis, to generate a first executable file; the NPU compiler acquires first performance data; the first performance data is performance analysis data generated by running the first executable file on a first device comprising the target NPU and by the target NPU performing a computation task of the initial computation graph; the NPU compiler determines a compiling optimization strategy based on the first performance data, and reconstructs the initial computation graph based on the compiling optimization strategy, to generate an optimized second executable file.

This invention relates to the field of deep learning technology, specifically to a power generation equipment anomaly prediction and adaptive maintenance system based on fused deep learning. The system first acquires multimodal local and global data through a multimodal acquisition unit; then, a first neural network processing unit inputs the multimodal local data into a knowledge-embedded hybrid neural network model to obtain local anomaly predictions; a second neural network processing unit inputs the multimodal global data into an encoder-decoder network based on cross-modal attention to obtain global anomaly predictions; a reinforcement learning processing unit optimizes the maintenance strategy using a reinforcement learning model and performs hyperparameter optimization on the reinforcement learning model using a genetic algorithm, thus achieving model interpretability; finally, an output unit provides a comprehensive anomaly prediction result and an updated maintenance strategy optimized by reinforcement learning and genetic algorithms to improve the effectiveness of anomaly prediction and maintenance.

A network packet processing device includes a parallel processing circuit, a packet dispatch circuit and a packet order-preserving processing circuit. The parallel processing circuit includes a plurality of packet processing circuits for processing different packets in parallel. Each packet processing circuit includes a network processing unit (NPU) core. The packet dispatch circuit distributes the packets to the packet processing circuits, respectively. The packet order-preserving processing circuit performs an order-preserved sending operation upon a plurality of processed packets generated by the parallel processing circuit, wherein the processed packets include first and second processed packets corresponding to first and second packets in the packets, respectively, and an order of the first and second processed packets in an output flow sent from the packet order-preserving processing circuit is the same as an order of the first and second packets in an input flow received by the packet dispatch circuit.

The application provides a model configuration method, device and storage medium of a speech recognition system, and relates to the technical field of intelligent chips. The model configuration method of the speech recognition system is run on a neural network processing unit of a chip of a target device, and the speech recognition system comprises a speech activity detection model, an automatic speech recognition model and a punctuation recovery model. The model configuration method comprises the following steps: determining basic parameters of the speech activity detection model; performing model conversion on the speech activity detection model with the determined basic parameters; performing character conversion packaging on the speech activity detection model that has undergone the model conversion, so as to deploy the speech activity detection model on the neural network processing unit; obtaining output data of the packaged speech activity detection model, and performing character conversion based on the output data through the automatic speech recognition model. According to the embodiment of the application, the whole process from audio collection input to text output with added punctuation can be realized.

This invention discloses a smart security monitoring terminal and monitoring system, including an image acquisition module, a main control chip, a circular storage medium, an event storage medium, and a communication module. The main control chip integrates an image signal processor, a video encoder, and a neural network processing unit. The circular storage medium is used to cyclically store the entire compressed bitstream, while the event storage medium has a longer write lifespan than the circular storage medium. The neural network processing unit outputs a first or second level signal, and the main control chip, in response to the first level signal, writes the compressed bitstream from the circular storage medium into the event storage medium. The communication module detects the network connection status; when disconnected, event video clips are retained in the event storage medium, and automatically pushed upon restoration. This invention, through dual storage media and a value judgment mechanism, solves the problem of easily lost critical event videos during network interruptions, reduces bandwidth consumption, and ensures the complete archiving of critical event data.

Embodiments of the present application disclose a neural network processing unit verification method and device and electronic equipment, and relate to the technical field of artificial intelligence. The method comprises: for a plurality of PEs included in an NPU, generating instruction sequences for each PE participating in a verification scenario based on a three-layer random mechanism of PE level, engine level and instruction level; generating source code files for the instruction sequences of each PE in a verification environment and compiling to generate respective corresponding firmware image files; loading the firmware image files of each PE into a virtual storage model to simulate a storage process, and carrying machine code in the virtual storage model to the instruction cache of each PE through an instruction carrying module inside the NPU; the processor of each PE respectively executes the corresponding machine code and drives the respective engine to perform corresponding operations; actual data obtained after each PE executes the machine code is acquired, and is compared with expected data generated based on a reference model, and the function of the NPU is verified according to the comparison result.

This application applies to the field of integrated circuit technology, providing a solid-state storage I / O scheduling system, method, solid-state drive (SSD), and electronic device. The system includes an SSD and a processor. The SSD integrates a main control chip and a neural network processing unit, which are vertically interconnected. The processor is installed in the electronic device, and the SSD is connected to or installed inside the electronic device. The processor is configured to: extract feature data of read / write requests when generating read / write requests for the SSD; the neural network processing unit is configured to: read the feature data; read the memory state of the SSD from the main control chip; run a neural network learning model based on the memory state and feature data to obtain scheduling information for read / write requests; and the processor is configured to: read the scheduling information and schedule read / write requests based on the scheduling information. This system can improve the I / O performance of the SSD.

The application is suitable for the technical field of embedded system, and provides a neural network processing unit testing method and device, a system on chip and a storage medium, wherein the method comprises the following steps: obtaining a to-be-executed task queue of a neural network processing unit, the to-be-executed task queue comprising a plurality of to-be-executed calculation tasks; determining an insertion time point according to a test period and an attribute of the to-be-executed task queue, a time interval between two adjacent insertion time points being less than or equal to the test period; and controlling the neural network processing unit to execute a test task according to the insertion time point in the process of executing the to-be-executed task sequence. Through the method, the insertion time point of the test task can be flexibly configured, and the calculation efficiency of the NPU that needs to be periodically tested is improved.

To provide a neural network device that improves the accuracy of predictions. [Solution] The neural network device 100 includes a neural network processing unit 130 that performs computational processing of a trained neural network on input data and outputs output data for said input data. The activation function f(x) of the neural network is expressed by equation (1) using parameters α, β, and γ, and the parameters α, β, and γ are optimized during training. [Math 1] TIFF2026110362000016.tif24128

This invention discloses a real-time monitoring system and method for learning states based on multimodal physiological signals. The system includes a core processing module, a carrier board, and an interface module. The method includes: step one, data acquisition; step two, memory mapping; step three, data preprocessing; step four, fusion inference; and step five, result storage. The core processing module relies on a unified memory and dedicated data mapping mechanism, allowing the neural network processing unit to directly read memory data, achieving real-time response and significantly reducing latency. The interface module implements physical channel isolation, avoiding bandwidth contention and ensuring high-bandwidth transmission without bottlenecks. It can achieve full-link synchronous storage of raw data, preprocessed data, and result data without consuming computing power, solving the contradiction between real-time inference and full data disk storage in general-purpose devices. The system has high integration, low power consumption, and is accurately adapted to learning monitoring scenarios, effectively solving the problem of synchronizing multi-source heterogeneous signals.

The present application provides a multi-channel data processing method, a reality display apparatus, a device, a medium, and a product. The method comprises: acquiring predefined line data output by at least two image signal processor channels; performing, in parallel, network inference on the predefined line data output by the at least two image signal processor channels, thereby eliminating the need to perform tiling processing on a full image to improve image processing accuracy, and reducing overall system computational power and data cache space requirements; and partitioning the predefined line data output by at least a portion of the image signal processor channels into a plurality of tiles, performing network inference on each tile of data according to a predefined policy, wherein the predefined policy involves a mobile terminal moving from a first end toward an opposite second end, and returning to the first end upon reaching the second end, until tile data inference is completed, thereby reducing neural processing unit memory overhead, improving the ability of a single neural network processing unit to process a plurality of image data channels in parallel, allowing for high frame rates and high resolutions, and reducing network inference latency.

This application discloses an artificial intelligence information education system and method based on a RISC-V processor architecture, relating to the field of artificial intelligence information education. The system includes: a central processing unit integrating multiple RISC-V CPU cores and an AI-accelerated neural network processing unit; a multimodal emotion coprocessor performing multi-label emotion classification and emotion intensity regression based on multimodal input data to obtain the user's emotion analysis results; the central processing unit assigning different AI task subgraphs to corresponding computing units; a RAG retrieval acceleration module retrieving relevant text fragments from an educational knowledge base to obtain enhanced cue context; and a neural network processor generating natural language responses to the multimodal input data using a large language model inference engine based on the enhanced cue context and the user's emotion analysis results. This application can provide real-time, secure, and human-like personalized AI tutoring and emotional interaction for teaching scenarios in completely offline or weak network environments.

This invention relates to the fields of image processing and embedded systems, and particularly to a low-power AOV data acquisition device and method. The device includes: a basic image sensor, which does not have an integrated automatic exposure control and motion detection hardware module; a neural network processing unit for loading and running an integrated processing model, a storage module, and a communication module; the integrated processing model runs to form a data-driven processing decision chain, including a preprocessing layer, an automatic exposure analysis subnetwork, and a motion detection subnetwork; the preprocessing layer converts the original Bayer image into a single-channel brightness image through fixed-weight convolution, and calculates a global brightness evaluation value from this brightness image to generate exposure control parameters, and generates event trigger signals based on brightness image analysis of consecutive frames. This invention software-izes the core image processing functions on a general-purpose NPU, fundamentally solving the contradiction between cost, power consumption, and flexibility in traditional solutions, and achieving low-cost, low-power AOV data acquisition.

The disclosure provides an artificial intelligence (AI) device, a neural network processing unit (NPU), and an operation method. The AI device includes a host circuit, a memory, and the NPU. The NPU is coupled to the host circuit and the memory. The NPU establishes a transmission connection to the host circuit. A model weight set of an AI model includes a first weight subset and a second weight subset. During an initialization period before the NPU executes the AI model, the host circuit preloads the first weight subset into the memory. During an execution period when the NPU executes the AI model, the NPU receives the first weight subset from the memory and the second weight subset from the host circuit for executing the AI model.