132 results about "Network processing unit" patented technology

The invention relates to the technical field of data security, can be applied to business scenes of financial science and technology, medical health and the like, and discloses a data encryption method, device, equipment and medium, comprising: acquiring a real-time state vector representing a running state of a chaotic neural network processing unit, monitoring a chaotic characteristic of the real-time state vector to generate a chaotic intensity index, and comparing the chaos intensity index with a preset chaos threshold value, generating an original key based on the real-time state vector when a key updating condition is met, dynamically adjusting a weight matrix of the chaos neural network processing unit according to the chaos intensity index, and performing cryptographic processing on the original key to generate a final key. And performing encryption processing on the target data by using the final key to generate target encrypted data. According to the method, the internal state of the chaotic neural network is used as a dynamic key generation basis, so that the dependence on an external entropy source and fixed parameters is eliminated, and the security and real-time performance of a data encryption process are improved.

The invention relates to the technical field of computer hardware and network communication, in particular to a high-speed I / O (input / output) virtualization server based on an FPGA (field programmable gate array) and a remote forwarding method.The high-speed I / O virtualization server comprises an FPGA chip, a network processing unit, an I / O protocol processing unit, a protocol conversion and scheduling unit, a time sequence and transaction management unit and a data buffering and flow control unit are integrated in the FPGA chip; the optical fiber Ethernet interface module comprises a physical layer interface and an MAC layer processing and network configuration interface; the local I / O interface module comprises a USB interface circuit, a serial port interface circuit, a PCIe interface circuit and an interface expansion connector; the power supply and monitoring module comprises a multi-path power supply management system, a state monitoring and diagnosis system and an LED indication system; according to the self-adaptive Baud rate detection circuit, the Baud rate can be accurately locked under the condition that data with less than two characters is received, the number of data bits, the type of a check bit and the length of a stop bit are automatically identified, and compared with a traditional microcontroller scheme, the self-adaptive Baud rate detection circuit has higher precision and higher detection speed.

The present disclosure relates to the field of artificial intelligence (AI) and quantum technologies, and provides a quantum error correction hardware decoder and a chip. The quantum error correction hardware decoder includes: a memory storing instructions, a neural network processing unit, and a processor in communication with the memory and the neural network processing unit; and wherein, when the processor executes the instructions, the processor is configured to cause the quantum error correction decoder to: obtain error syndrome information for an error syndrome measured due to an error occurring in a quantum circuit, decode, by the neural network processing unit, the error syndrome information based on a neural network model to obtain an output result of the neural network model, and determine error information based on the output result, the error information indicating a qubit in which an error occurs in the quantum circuit and a corresponding error type.

The invention provides an edge gateway computing power sharing method based on an MQTT protocol. An edge terminal sends a computing power request to an edge gateway through the MQTT protocol, wherein the computing power request comprises a computing task type identifier and a priority identifier; after receiving the computing power request, the edge gateway dynamically schedules heterogeneous computing resources of a built-in neural network processing unit (NPU) and a built-in central processing unit (CPU) according to a computing task type identifier and a priority identifier; and the edge gateway executes a corresponding calculation task by using the scheduled calculation resource, feeds back a processing result to the edge terminal initiating the request through an MQTT protocol, and synchronizes own calculation power state information.

Various example embodiments of a processing unit fault detection capability are presented. The processing unit fault detection capability may be configured to support detection of faults in processor cores of a processing unit based on arrangement of the processor cores to form a data processing pipeline and monitoring of the processor cores of the data processing pipeline based on monitoring of the data processing pipeline (e.g., based on propagation of heartbeat messages via the data processing pipeline). The processing unit fault detection capability may be configured to support detection of faults in processor cores of various types of processing units, such as central processing units (CPUs), graphics processing units (GPUs), network processing units (NPUs), or the like.

The invention provides an industrial multi-protocol heterogeneous real-time video collaborative analysis method. The method comprises the steps that a lightweight compiler is developed, an operator dependency graph analysis module is integrated, instruction-level parallelism of a neural network processing unit is predicted through a graph neural network, and optimization intermediate representation is dynamically generated; constructing a protocol classification graph neural network model, carrying out protocol type self-identification and streaming media metadata automatic extraction, and converting a heterogeneous video stream into a standardized frame sequence; designing a multi-agent reinforcement learning model, and generating an optimal scheduling strategy through offline simulation training by taking a neural network processing unit calculation unit utilization rate, a memory bandwidth occupancy rate and a task queue depth as state spaces; predicting a video key region by adopting a hybrid network, and performing resolution downsampling on a non-key region in combination with motion vector analysis; the hardware-level scheduling adopts time slice rotation preemptive scheduling, and time slices are dynamically distributed according to the priority of an algorithm.

A control chip is provided. A storage circuit includes a memory and a control circuit. The memory includes a first region and a second region. The first region stores command streams. The second region stores parameters. The control circuit accesses the memory. A neural-network processing unit (NPU) receives a destination block and performs a destination command stream corresponding to the destination block. In response to the destination command stream pointing to the second region, the control circuit or the NPU determines whether the destination command stream has access authority. In response to the destination command stream not having access authority, the control circuit does not read the second region. In response to the destination command stream having access authority, the control circuit reads the second region and provides the destination parameter stored in the second region to the NPU.

The density and power consumption of modern integrated circuits, such as Graphic Processing Units (GPUs), Central Processing Units (CPUs), and Network Processing Units (NPUs) is growing rapidly, which necessitates designing advanced cooling systems. Existing solutions for characterizing and validating these cooling system are inadequate. A flexible, scalable Thermal Test Vehicle (TTV) is disclosed which is based on an array of power transistors, measurement / control circuitry, and onboard computer. The TTV is configured for characterizing the performance of electronic cooling solutions under a variety of operating conditions.

The invention provides a neural network processing unit scheduling system and method, relates to the field of artificial intelligence accelerators, and can set a task progress register in a neural network processing unit for recording the task processing progress of the neural network processing unit for processing and calculating sub-tasks and exposing the task processing progress to a software layer. A scheduler and a global shared task queue can be arranged in the runtime module. The scheduler is used for scheduling the calculation subtasks to the neural network processing units, screening the slow processing units according to the task processing progress of the neural network processing units, determining the remaining subtasks which are not completed by the slow processing units, taking the remaining subtasks as the calculation subtasks again, and sending the calculation subtasks to the neural network processing units; and re-issuing to the idle neural network processing unit through the global shared task queue. Therefore, the remaining sub-tasks which are not completed by the low-speed processing unit can be re-issued to the idle neural network processing unit, so that idle computing resources can be avoided, and the processing efficiency is improved.

The invention relates to the technical field of cross of storage controllers and artificial intelligence acceleration, and discloses a large model reasoning system and method based on combination of a flash memory controller and an NPU (Network Processing Unit), and the large model reasoning system comprises the flash memory controller, the NPU and a flash memory array, the flash memory controller integrates a host interface module, a flash memory interface module, an independent AI acceleration interface module and an AI management engine, and the AI management engine autonomously completes NPU initialization, model weight direct loading, KV Cache hierarchical management, RAG knowledge base retrieval and model switching; the flash memory array is divided into a firmware partition, an AI special partition and a user storage partition, and different data storage requirements are met. According to the method, large model reasoning with low delay and low CPU dependence can be realized, and the model loading delay is reduced from 5-30 seconds to lt; after 500 milliseconds, the CPU occupancy rate of the host is reduced from 15-25% to lt; 2%, and concurrent operation of 4-8 models is supported. According to the invention, integration of storage and calculation is realized, and edge end, data center and mobile equipment scenes are adapted.

An apparatus and method are disclosed for a fabric interface of a processing entity (PE) within a PE array optimized for neural network computations. The fabric interface includes a channel extension circuit and a channel compression circuit. The channel extension circuit is configured to receive first data from another PE, extend the channel dimension of the first data to produce extended data with an increased dimension that aligns with the minimum data granularity of an associated memory, and store the extended data in the memory. Conversely, the channel compression circuit is configured to fetch second data from the memory, compress the channel dimension of the second data to obtain compressed data with a reduced dimension, and output the compressed data from the PE.

The application provides an epilepsy prediction system based on multi-element weighted joint recursion and graph attention network, which can be applied to the fields of biomedical signal processing and artificial intelligence technology. The system comprises a brain function imaging module configured to acquire electroencephalogram signal data of a target object under authorization of the target object; a processor comprising a multi-element weighted joint recursion processing unit configured to obtain a phase space trajectory vector of each channel of the electroencephalogram signal data according to the electroencephalogram signal data, construct a recursion graph according to the phase space trajectory vector of each channel, obtain a channel correlation coefficient between any two channels based on the recursion graph of each channel, and construct a weighted adjacency matrix representing the brain function of the target object according to the channel correlation coefficient between any two channels; and a graph attention network processing unit configured to perform spatiotemporal feature processing according to the weighted adjacency matrix and the electroencephalogram signal data and output an epilepsy seizure prediction result.

The invention provides an operator fusion method and device, equipment and a medium, which are used for solving the technical problems of low fusion efficiency, poor applicability or overlarge calculation amount consumed by fusion when operator fusion is carried out in the related art, and the method comprises the following steps: obtaining a plurality of operators to be fused; for any operator, based on a processing function of a preset neural network processing unit (NPU), determining at least one target operator which can be fused with the operator in the plurality of operators; and fusing the operator and the at least one target operator into a combined operator and processing the combined operator by using the NPU.

A network device includes a storage device and a network processing unit (NPU). The storage device stores a mapping of address and port (MAP) information table, wherein the MAP information table includes a plurality of table entries that store a plurality of second internet protocol (IP) headers each complying with a second IP version. The NPU receives a first packet with a first IP header that complies with a first IP version different from the second IP version, and generates and forwards a second packet that includes a second IP header retrieved from the storage device and at least a portion of the first packet.

A network device includes a storage device, a central processing unit (CPU), a hardware acceleration circuit, and a network processing unit (NPU). The storage device stores program codes. The CPU loads and executes the program codes to deal with a control function of a network speed test. The hardware acceleration circuit provides hardware-accelerated packet forwarding. The NPU interacts with the control function performed by the CPU, and deals with processing of data packets used for the network speed test. Transmission of the data packets between the network device and another network device is performed through the NPU and the hardware acceleration circuit, without intervention of the CPU.

A network device includes a storage device, a central processing unit (CPU), a hardware acceleration circuit, and a network processing unit (NPU). The storage device stores program codes. The CPU loads and executes the program codes to deal with a control function of a network speed test. The hardware acceleration circuit provides hardware-accelerated packet forwarding. The NPU interacts with the control function performed by the CPU, and deals with processing of data packets used for the network speed test. Transmission of the data packets between the network device and another network device is performed through the NPU and the hardware acceleration circuit, without intervention of the CPU.

The invention discloses a network configuration method and device, related equipment, a storage medium and a computer program product, and is applied to the technical field of cloud computing. The method comprises the following steps: in response to an application request of a user for applying for a bare metal server, according to link layer discovery protocol information of a plurality of neural network processing units (NPUs) in a target bare metal server, respectively distributing network configuration information for the NPUs to obtain parameter plane network information of the target bare metal server; updating a configuration drive file of the target bare metal server based on the parameter surface network information; and controlling the target bare metal server to execute the configuration drive file, and triggering the target bare metal server to perform network configuration on the plurality of NPUs when the configuration drive file is executed.

The invention discloses an ultra-low background measurement device and method for discriminating beta and gamma, and relates to the field of pulse discrimination and ultra-low background measurement. The liquid scintillator outputs fluorescence through radiation of the radioactive source; the high-speed photomultiplier performs photoelectric conversion on the fluorescence and outputs a high-speed current pulse signal; the data processing unit converts the high-speed current pulse signal into a high-speed voltage pulse signal, carries out direct bias and gain adjustment, and carries out analog-to-digital conversion to obtain a digital signal; the main control unit preprocesses the digital signal, and performs feature processing and pulse position adjustment on the preprocessed digital signal to obtain pulse feature data; a built-in convolutional neural network in the neural network processing unit determines a discrimination result about beta and gamma according to the pulse characteristic data and the digital signal; and the main control unit carries out gamma background elimination according to a discrimination result so as to realize ultra-low background measurement. According to the invention, pulse discrimination is carried out rapidly and accurately, so that the background is eliminated, and ultra-low background measurement is realized.

The invention relates to the technical field of avionics communication. The invention provides an airborne satellite communication processing terminal. The airborne satellite communication processing terminal comprises a data control unit, a satellite data processing unit and a network processing unit, the satellite data processing unit sends data sent by a satellite to the data control unit; the data control unit performs communication protocol analysis and data format conversion on the received data; the data control unit sends the data subjected to communication protocol analysis and data format conversion to the network processing unit; the network processing unit encapsulates the received data into an Ethernet frame and then sends the Ethernet frame to the built-in network; the built-in network sends the received data to the data control unit through the Ethernet communication interface; and the data control unit encrypts the received data, converts the encrypted data into satellite signals and sends the satellite signals to a satellite. Satellite communication is converted into a universal Ethernet communication interface, and the compatibility problem of multi-platform interfaces is solved.

The application discloses a network configuration method and device, related equipment, a storage medium and a computer program product, and applies to the technical field of cloud computing. The method comprises the following steps: in response to an application request of a user applying for a bare metal server, network configuration information is respectively allocated to a plurality of neural network processing units (NPUs) in a target bare metal server according to link layer discovery protocol information of the plurality of NPUs, and parameter plane network information of the target bare metal server is obtained; based on the parameter plane network information, a configuration driver file of the target bare metal server is updated; and the target bare metal server is controlled to execute the configuration driver file, and the configuration driver file triggers the target bare metal server to perform network configuration on the plurality of NPUs when being executed.

The invention relates to an intelligent depth reconstruction architecture and method for a strip-shaped scintillator, and the architecture specifically comprises a position sensitive strip-shaped scintillator which is used for converting incident radiation particles into photon signals, and converting the photon signals into pulse signals through silicon photomultipliers coupled to the two ends of the scintillator; the analog front-end circuit is used for amplifying and shaping the pulse signal, then completing high-speed sampling through a high-speed analog-to-digital conversion circuit module and converting an analog signal into a digital signal; the field programmable gate array data processing module is used for digital imaging preprocessing, amplitude extraction and time marking operation, and meanwhile, key information is added to each event data; an auto-encoder model based on an artificial neural network is deployed in a data processing module of the neural network processing unit, and the neural network processing unit is used for carrying out feature extraction and mode matching analysis on the input signals and outputting reconstruction parameters corresponding to interaction positions in the strip-shaped scintillators. And localized intelligent processing of the nuclear pulse signal is realized.

The invention provides an ultrasonic guided wave online defect detection method for a shell-and-tube heat exchanger and the heat exchanger. The method comprises the steps that a sensor array is permanently installed in a specific annular area of the outer surface of a tube plate; exciting and receiving the non-dispersion torsional guided wave to obtain an echo signal; performing noise reduction, frequency dispersion compensation and feature extraction on the signal; intelligently identifying defect types by using a pre-trained attention mechanism neural network model, quantifying the size and evaluating the confidence coefficient; using a fatigue or corrosion model to predict the remaining life based on the defect size and generating a report; a corresponding shell-and-tube heat exchanger is integrated with the detection system, the detection system comprises a sensor array and a built-in ultrasonic circuit, and through a network processing unit NPU special chip, an NB-IoT communication module and an embedded monitoring unit managed by an intelligent power supply, non-stop and online automatic defect detection and safety early warning of the heat exchanger are achieved.

A quantum error correction hardware decoder and chip, relating to the fields of artificial intelligence and quantum technology, includes: an instruction storage device configured to store computer instructions; a control unit configured to read the computer instructions from the instruction storage device and control at least one neural network processing unit based on the computer instructions; the at least one neural network processing unit configured, in response to control by the control unit, to decode error syndrome information of a quantum circuit based on a neural network model to obtain an output result of the neural network model, where the error syndrome information indicates an error syndrome obtained by performing error measurements on the quantum circuit; and an error batch search unit configured to determine error information based on the output result, where the error information indicates a quantum bit in the quantum circuit where an error has occurred and an error type corresponding to the error. The programmable hardware architecture provided in this application can ensure decoding performance while sufficiently reducing decoding delay and improving scalability and flexibility.

This invention discloses an automated sorting robot system based on an embedded vision module, belonging to the field of computer vision technology. Its features include: an image acquisition module for acquiring image information of workpieces to be sorted, comprising at least two cameras and two lasers emitting parallel laser lines to form a binocular structured light ranging field; an embedded main control module electrically connected to the image acquisition module, comprising a neural network processing unit (NPU), a model inference unit, a depth calculation unit, and a coordinate transformation unit; a sorting execution module communicatively connected to the embedded main control module for performing gripping and placement operations based on the workpiece's three-dimensional coordinates and dimensions output by the embedded main control module; and a central server module connected to several embedded main control modules via an industrial Ethernet or message queue communication protocol.

The invention discloses a multi-network processing unit cooperative MPLS message processing method and system, the system at least comprises a first network processing unit located at an entrance and a second network processing unit located at an exit port, and the network processing units are sequentially connected through internal loopback ports; wherein the first network processing unit is used for identifying an MPLS (Multi-Protocol Label Switching) message and adding a custom mark and a traceability VLAN to the MPLS message; redirecting the MPLS message added with the custom mark and the traceability VLAN to an internal loopback port, and enabling the MPLS message to finally reach a second network processing unit after loopback; the second network processing unit is used for further processing according to the custom mark in the MPLS message, including stripping and complementing the label and / or modifying the traceability VLAN; and redirecting the processed MPLS message to a final output port. According to the method, the function limitation and the performance bottleneck of a single processing unit are effectively overcome, and the efficient and flexible forwarding of the complex MPLS flow is ensured.

A dental triage and clinical risk assessment system (100), the system (100) comprising: a first user device (102) configured to receive patient-related dental information for remote dental assessment; a first user interface (104) within the first user device (102) that is configured to guide the patient's interaction by presenting structured symptom questionnaires, image acquisition instructions, and status notifications; a communication network (110) that is connected to the first user device (102) and configured to securely transmit patient-related dental information and control signals; a processing unit (112) connected to the first user device (102) via the communication network (110) and configured to perform automated dental triage and clinical risk assessment through coordinated data analysis decision logic and routing operations, wherein the processing unit (112) comprises: a data acquisition module (114) configured to receive patient-related dental information from the first user device (102); a data preprocessing module (116) configured to validate, normalize and structure the received dental information for analytical processing; a triage intelligence module (124) configured to analyze the structured dental information to generate a quantified urgency score and risk classification level using combined analytical logic; a decision support module (130) configured to assign the urgency score and risk classification level to a recommended dental care pathway; a nursing navigation module (134) configured to generate routing instructions corresponding to emergency referrals, scheduled consultations, teleconsultations or automated guidance; a learning and analysis module (144) configured to update internal analytical parameters based on confirmed clinical results; a storage unit (154) connected to the processing unit (112) and configured to store patient data, analytical results, priority points, routing decisions and result feedback for continuous system operation; a second user device (158), connected to the processing unit (112) via the communication network (110) and configured to receive triage outputs and recommendations for care pathways; and a second user interface (160) in the second user device (158), configured to display risk indicators, urgency points, patient data summaries and override controls for interaction with the clinician.

The invention relates to an AI processor based on storage and calculation integration, three-dimensional integration and memory sharing and a control method of the AI processor. The calculation unit is coupled with the at least one storage unit through a three-dimensional integration technology, and the calculation unit comprises a neural network processing unit which is used for executing neural network correlation calculation; the interface device is arranged on the computing unit and is used for performing communication coupling on the AI processor and external main control equipment; the control module is arranged in the storage unit and used for switching the storage unit between a first working mode and a second working mode, and in the first working mode, the storage unit establishes communication coupling with external main control equipment through the interface device and executes storage operation in response to the read-write request; in the second working mode, the storage unit establishes communication coupling with the neural network processing unit, and responds to a calculation request of the neural network processing unit to assist in executing calculation operation; and the functions of high-performance AI acceleration and general storage are considered through working mode switching and time division multiplexing.

The invention discloses a photovoltaic power generation power edge prediction method, and the method comprises the steps: firstly collecting photovoltaic output power and multi-dimensional meteorological data, and constructing a training set and a test set after normalization; then, key features are extracted by adopting a random forest method based on the training set, and a prediction model is built and trained by utilizing a BiTCN-BiGRU hybrid neural network architecture; performing pruning optimization on the trained model, converting the model into an RKNN format, performing quantification processing and performance evaluation on the model, and performing further optimization according to an evaluation result to obtain a lightweight model; and finally, the lightweight model is deployed in an edge energy management unit, hardware acceleration is performed by means of a neural network processing unit, and millisecond-level online reasoning and real-time prediction of the photovoltaic power generation power are realized. Through fusion of feature selection and a bidirectional time sequence convolution-recurrent neural network, the limitation of a traditional method in processing high-dimensional features is effectively overcome, the prediction precision and generalization ability are improved, and efficient and low-delay power prediction is realized through edge side deployment.