Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

CMOS hybrid SR memristor latch circuit with asynchronous setting and resetting

A technology of setting reset and memristor, applied in the direction of logic circuit, electrical components, reliability improvement and modification, etc., can solve the problems of not greatly reducing the number of circuit devices, excessive circuit power consumption, etc. less, the circuit structure is simplified, and the circuit structure is simple.

Active Publication Date: 2021-06-11
HANGZHOU DIANZI UNIV
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the current design of memristors in flip-flop circuits is mostly improved based on traditional storage circuits. Although memristors are used, the number of devices in the entire circuit has not been greatly reduced. Memristors can make the circuit structure Simpler features are not reflected, and problems such as excessive power consumption caused by circuit complexity still exist. Therefore, the present invention makes full use of the characteristics of memristors, combines them with CMOS transistors, and adopts a new structure to design hybrid memristor storage circuits. , expand the application of memristors in memory circuits, and guide the way for the design of memristors in digital logic circuits

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • CMOS hybrid SR memristor latch circuit with asynchronous setting and resetting
  • CMOS hybrid SR memristor latch circuit with asynchronous setting and resetting
  • CMOS hybrid SR memristor latch circuit with asynchronous setting and resetting

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described below in conjunction with the accompanying drawings and examples of the invention.

[0018] figure 1 It is a block diagram of the circuit structure of the present invention, and the whole circuit includes an SR memristor latch module and a memristor asynchronous setting and reset module, wherein the SR memristor latch module is composed of memristors and CMOS transistors, the circuit structure is simple, and the number of components is relatively small. The traditional SR latch is greatly reduced and fully functional. The memristor asynchronous set reset module is constructed by the AND gate and the OR gate formed by the memristor, and realizes the asynchronous set and reset function of the circuit. The entire circuit uses a small number of components, is fully functional, and is non-volatile

[0019] figure 2 It is...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a CMOS hybrid SR memristor latch circuit with asynchronous setting and resetting. The CMOS hybrid SR memristor latch circuit comprises two modules, namely an SR memristor latch module and a memristor asynchronous setting and resetting function module. The SR memristor latch module comprises a first MOS tube T1, a second MOS tube T2, a third MOS tube T3, a fourth MOS tube T4, a fifth MOS tube T5, a sixth MOS tube T6, a first memristor M1, a first phase inverter N1, a second phase inverter N2 and a first resistor R1; the memristor asynchronous setting and resetting function module comprises a second memristor M2, a third memristor M3, a fourth memristor M4, a fifth memristor M5 and a third phase inverter N3; and the SR memristor latch module is formed by mixing a memristor and a CMOS, and the circuit has non-volatility. The memristor asynchronous setting and resetting function module is formed by an AND gate and an OR gate which are formed by memristors, and the circuit structure is simplified to the maximum degree through a memristor logic gate circuit, so that the number of components is reduced.

Description

technical field [0001] The invention belongs to the technical field of circuit design, and relates to a full-featured SR memristive latch circuit, in particular to a CMOS hybrid SR memristive latch circuit with asynchronous reset, which realizes level triggering and has Volatile features and an asynchronous set-reset function. Background technique [0002] Memristors were first proposed in 1971, and have received more and more attention as a new type of device. Memristors have the characteristics of non-volatility and hysteresis, which can be used in chaotic circuits, neural networks, digital logic circuits and other fields, especially storage circuits. The application of it has great advantages, and a series of achievements have been made, such as basic flip-flops of digital circuits, etc. However, the current design of memristors in flip-flop circuits is mostly improved based on traditional storage circuits. Although memristors are used, the number of devices in the enti...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/003H03K19/094
CPCH03K19/003H03K19/094
Inventor 林弥陈俊杰王旭亮罗文瑶韩琪
Owner HANGZHOU DIANZI UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products