Unlock instant, AI-driven research and patent intelligence for your innovation.

Chip and exception handling method thereof

A chip and abnormal technology, applied in the field of chip and its abnormal processing, can solve the problems of high current variation, low voltage, complex behavior of the central processing unit, etc., and achieve the effect of ensuring normal operation

Pending Publication Date: 2021-07-16
REALTEK SEMICON CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the behavior of the central processing unit is extremely complex. In fact, it is difficult for designers to predict the application scenarios and calculations performed by the central processing unit through simulation. Large current changes are likely to occur and the voltage is too low.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip and exception handling method thereof
  • Chip and exception handling method thereof
  • Chip and exception handling method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] refer to figure 1 , figure 1 A schematic circuit block diagram of a chip according to some embodiments is shown. According to some embodiments, the chip 10 includes a processor 30 . According to some embodiments, the chip 10 includes a chip circuit 20 and a processor 30 .

[0023] The chip 10 is a chip with a processor 30 , such as but not limited to a system on a chip (SOC), and the chip circuit 20 is a circuit other than the processor 30 in the chip. In some embodiments, the chip 10 is a system chip with a central processing unit, the processor 30 is the central processing unit (Central Processing Unit, CPU) of the system chip, and the chip circuit 20 is the system chip except the central processing unit. other circuits, such as power management circuits, memory, peripheral interface circuits, buses, specific function circuits, and input and output ports, etc., the peripheral interface circuits are such as but not limited to integrated circuit bus (Inter-Integrated...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a chip and an exception handling method thereof. The chip comprises a processor. The processor comprises a control circuit, a voltage detection circuit, a neural network circuit and a processing circuit. The control circuit is configured to read an instruction to execute the read instruction. The voltage detection circuit is used for detecting a voltage of the processor to output a voltage value. The neural network circuit predicts and outputs an output signal according to the voltage value and the instruction, and the processing circuit executes an abnormal program when the output signal is abnormal. Therefore, the chip can predict whether the processor is possible to operate under the condition of being lower than the rated voltage and take corresponding measures to ensure the normal operation of the chip.

Description

technical field [0001] The invention relates to a chip and its abnormal processing method, in particular to a chip with a processor and its abnormal processing method. Background technique [0002] A System on a Chip (SoC) is a chip that integrates multiple functional components, such as a chip that integrates a central processing unit, memory, logic components, and analog components. [0003] When the SoC is in operation, power is supplied to the SoC from outside, and then the SoC supplies power to its internal components. The SoC operates according to the external requirements (request) of the chip, and makes its internal components operate according to the requirements. Under certain requirements, an internal component may operate at full load or near full load. When the internal component operates near full load, the power consumption of the internal component increases, which may produce large current changes and cause the The voltage of the power supplied to the inte...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F11/07G06F1/26G06N3/063
CPCG06F11/0793G06F1/26G06N3/063
Inventor 谢瀚颉
Owner REALTEK SEMICON CORP