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Wafer etching method

A wafer, etch depth technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of poor etch depth uniformity of the first material layer, so as to improve the uniformity of etch depth and meet the performance requirements Requirement, loss reduction effect

Pending Publication Date: 2021-09-28
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art, and proposes a wafer etching method, which can precisely control the etching depth of the second material layer (such as a titanium nitride layer), thereby It can solve the problem of poor etching depth uniformity of the first material layer (such as tungsten) caused by the inability of the second material layer to be etched in time

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no. 1 example

[0047] The wafer etching method provided in this embodiment is, for example, applied to the etching back method of the first material layer (such as tungsten). Before performing the etching back method, the wafer to be etched has a morphology as figure 1 As shown, the wafer includes a substrate 101, a mask layer 103 disposed on the substrate 101, and a first material layer 105, wherein the substrate 101 is, for example, a silicon wafer (Si), and the mask layer 103 is, for example, Silicon nitride (SiN) or silicon oxide (SiO 2 ), optionally, a natural oxide layer 102a is formed between the substrate 101 and the mask layer 103, and the natural oxide layer 102a is, for example, a natural oxide layer of silicon (ie, silicon oxide). Trenches or holes are correspondingly formed on the silicon wafer 101 , the natural oxide layer 102 a and the mask layer 103 . Optionally, the upper surface of the mask layer 103 and the sides of the groove or hole are covered with a silicon oxide laye...

no. 2 example

[0060] The wafer etching method provided in this embodiment is an improvement made on the basis of the above-mentioned first embodiment, that is, for the situation that the above-mentioned first specified etching depth is less than the preset target depth, in order to reduce the etching etch time, and ensure the uniformity of etch depth between trenches or holes of different widths, please refer to image 3 , the above-mentioned wafer etching method comprises the following steps:

[0061] S1. Etching and removing the surface layer portion 105b of the first material layer 105;

[0062] After step S1 is completed, the etched topography of the wafer is as follows Figure 4A As shown, the surface portion 105b of the first material layer 105 is almost completely removed, at this time, the initial etching depth of the filling portion 105a of the first material layer 105 is H0, and the initial etching depth of the second material layer 104 is h0.

[0063] S2. Etching the second mat...

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Abstract

The embodiment of the invention provides a wafer etching method. The wafer etching method comprises the steps of S1, etching to remove a surface layer part of a first material layer; S2, etching the second material layer until the second material layer is lower than or flush with the filling part of the first material layer; and S3, depositing a protective layer covering the mask layer, and etching the filling part of the first material layer and the second material layer at the same time until the filling part reaches a first specified etching depth. According to the wafer etching method provided by the embodiment of the invention, the etching depth of the second material layer (such as a titanium nitride layer) can be accurately controlled, so that the problem that the etching depth uniformity of the first material layer (such as tungsten) is relatively poor as the second material layer cannot be etched in time can be solved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a wafer etching method. Background technique [0002] Tungsten material is widely used in semiconductor manufacturing because of its good conductivity. It is often used as a conductor for interconnection or electronic conduction between devices. Especially in advanced manufacturing processes, tungsten material is an important component of the gate structure of transistors. one of metal. [0003] Tungsten etching is mainly an etch-back technique. Before performing the tungsten etching, such as figure 1 As shown, the structure of the wafer includes, for example, a silicon wafer 101, a natural silicon oxide layer (ie, silicon oxide) 102a, and a silicon nitride layer 103 (or silicon oxide) used as a mask, arranged sequentially from bottom to top, wherein , grooves or holes are formed by etching on the silicon wafer 101, the natural oxide layer 102a and the silicon nitride...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3213
CPCH01L21/32139H01L21/32136
Inventor 连庆庆刘海龙朱瑞苹蒋中伟
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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