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Memory polynomial-based power amplifier model and hardware implementation method thereof

A technology of memorizing polynomials and models, applied to power amplifiers, improving amplifiers to reduce nonlinear distortion, etc., can solve the problems of system operating frequency reduction, data update speed slowing down, etc., and achieve the effect of simple hardware design

Active Publication Date: 2021-10-19
CHONGQING UNIV OF POSTS & TELECOMM
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0018] The object of the present invention is to provide a kind of power amplifier model based on memory polynomial and hardware implementation method thereof, to at least solve the existing hardware implementation method based on memory polynomial power amplifier model because the data in the look-up table needs to be updated in real time, for comprising self-adaptive algorithm The predistortion system, each predistortion module complex gain coefficient a kq The iterative replacement will generate a huge data flow, resulting in slower data update speed and technical problems such as lowering the overall operating frequency of the system.

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  • Memory polynomial-based power amplifier model and hardware implementation method thereof
  • Memory polynomial-based power amplifier model and hardware implementation method thereof
  • Memory polynomial-based power amplifier model and hardware implementation method thereof

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Embodiment 1

[0049] Please refer to Figure 1 to Figure 7 , a hardware implementation method of a memory polynomial-based power amplifier model provided by an embodiment of the present invention, including:

[0050] memory polynomial complex baseband model split into formula and the formula Among them, K is the nonlinear order, Q is the memory depth, and the two formulas are realized through the LUT (display lookup table) module and the convolution module respectively;

[0051] Input the signal x(n) into the convolution module;

[0052] Input the signal x(n) into the LUT module for joint addressing, and find the content of the lookup table stored in the LUT module corresponding to the input signal, that is, the signal x(n)|x(n)| 2 , x(n)|x(n)| 4 ...x(n)|x(n)| 2K ;

[0053] The LUT module converts the signal x(n)|x(n)| 2 , x(n)|x(n)| 4 ...x(n)|x(n)| 2K Parallel output to the convolution module;

[0054] Through the convolution module, the signal x(n), x(n)|x(n)| 2 , x(n)|x(n)...

Embodiment 2

[0078] Please refer to Figure 1-Figure 7 , a memory polynomial-based power amplifier model provided by an embodiment of the present invention includes:

[0079] The LUT module is used to receive the input signal x(n), and the signal x(n) is input to the LUT module for joint addressing, and finds the content of the lookup table stored in the LUT module corresponding to the input signal, that is, the signal x(n)|x (n)| 2 , x(n)|x(n)| 4 ...x(n)|x(n)| 2K , the LUT module converts the signal x(n)|x(n)| 2 , x(n)|x(n)| 4 ...x(n)|x(n)| 2K Parallel output to the convolution module;

[0080] The convolution module is used to receive the input signal x(n), and convert the signal x(n), x(n)|x(n)| 2 , x(n)|x(n)| 4 ...x(n)|x(n)| 2K with an externally input complex gain factor A kq Perform a convolution operation to obtain an output signal y(n), the output signal To memorize the polynomial complex baseband model, the model is decomposed into the formula and the formula Where...

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Abstract

The invention discloses a memory polynomial-based power amplifier model and a hardware implementation method thereof, and the method comprises the steps: dividing a memory polynomial complex baseband model into a formula and a formula, and achieving the two formulas through an LUT module and a convolution module respectively; inputting the signal x (n) into a convolution module; inputting the signal x (n) into an LUT module for joint addressing, and finding out lookup table contents corresponding to the input signal stored in the LUT module, namely signals x(n)|x(n)|2, x(n)|x(n)|4... x(n)|x(n)|2K; the LUT module outputs the signals x(n)|x(n)|2, x(n)|x(n)|4... x(n)|x(n)|2K to the convolution module in parallel; and performing convolution operation on the signals x (n), x(n)|x(n)|2, x(n)|x(n)|4... x(n)|x(n)|2K and an externally input complex gain coefficient Akq through a convolution module to obtain an output signal y(n). Compared with the prior art, less hardware multipliers can be consumed, the hardware design is simpler, excessive address control logic and sequential control logic are not needed, the operation period is shorter, and the frequency of the predistortion system is improved.

Description

technical field [0001] The invention relates to the technical field of digital predistortion, in particular to a memory polynomial-based power amplifier model and a hardware implementation method thereof. Background technique [0002] The key to researching digital pre-distortion technology lies in the fitting of the power amplifier behavior model. Only through an accurate mathematical model can the hardware circuit describe the accurate power amplifier behavior, so that the digital pre-distortion technology can obtain the best pre-distortion effect in practical applications. . [0003] Current power amplifier models include Volterra series models, memory polynomial models (Memory Polynomial, MP), generalized memory polynomial models (Generalized Memory Polynomial), and the like. Among them, the Volterra series is the most widely used mathematical model in simulation software, because it contains many cross terms and power terms, where the definition of the cross term is th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F1/32H03F3/20
CPCH03F1/32H03F3/20
Inventor 张红升易胜宏刘红江费林坤
Owner CHONGQING UNIV OF POSTS & TELECOMM
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