SOI wafer with high heat dissipation performance and preparation method of SOI wafer

Abstract

The invention provides an SOI wafer with high heat dissipation performance and a preparation method of the SOI wafer. The SOI wafer sequentially comprises a bulk silicon wafer, a buried oxide layer and a silicon device layer, a groove with a preset depth is formed in one side, close to the buried oxide layer, of the bulk silicon wafer, the groove is filled with a high-thermal-conductivity material, the high-thermal-conductivity material is fixed by adopting heat dissipation glue, and the high-thermal-conductivity material is a carbon nano tube or molybdenum disulfide. According to the invention, the grooves are formed in the bulk silicon wafer, and the grooves are filled with the high-thermal-conductivity material made of the carbon nanotubes or the molybdenum disulfide, so that the heat dissipation performance of an SOI circuit can be effectively improved based on the high thermal conductivity of the carbon nanotubes and the molybdenum disulfide, and the size of the SOI wafer is made to be larger; in addition, the high-thermal-conductivity material is arranged in the bulk silicon wafer, the area of the silicon device layer is not affected, the utilization rate of the active region is improved, the cost is reduced, and the integration level is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor-on-insulator substrates, in particular to an SOI wafer with high heat dissipation performance and a preparation method thereof. Background technique [0002] Due to the advantages of low parasitic junction capacitance and Buried Oxid (BOX) isolation, Silicon-on-Insulator (SOI) technology is widely used in low-power, high-speed and high-reliability integrated circuits. However, due to the relatively low thermal conductivity of the buried oxide layer, there is a self-heating effect in the high-density integrated SOI circuit, resulting in a decrease in the channel current of the device and the formation of negative differential resistance, which greatly limits the application of semiconductor-on-insulator technology. limit. [0003] Therefore, it is necessary to propose an SOI wafer with high heat dissipation performance and a preparation method thereof, so as to effectively improve the heat d...

AI Technical Summary

Problems solved by technology

However, due to the relatively low thermal conductivity of the buried oxide layer, there is a self-heating effect in the high-density integrated SOI circuit, resulting in a decrease in the channel current of the device and the formation of negative differential resistance, which greatly limits the application of semiconductor-on-insulator technology. limit

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