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Fast connected domain labeling method based on FPGA Raster Scan mode

A connected domain and fast technology, applied in the field of image processing, can solve the problems of labeling algorithm with high time requirements, consume large hardware resources, destroy speed gain, etc., achieve the effect of occupying less resources, improving processing speed, and simplifying complexity

Inactive Publication Date: 2022-01-04
南京威翔科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, these operations are processed individually for each pixel. Traditional software connected region marking algorithms, such as random read algorithm, multi-scan algorithm, and double-scan algorithm, are mostly performed serially, because the The labeling of pixels is not a local operation (pixels that are far apart may belong to the same connected domain and thus require the same number), so for a continuous video stream processing, the time requirements for the labeling algorithm will also be very high
[0004] In traditional technology, many parallel computing architectures have been proposed to accelerate the numbering process. The limitation of these methods is that when traditional algorithms are implemented through hardware, a large number of processing units are required, which consumes a lot of time when implementing them on FPGA. a lot of hardware resources
When processing video streaming images, the system is mostly idle during the process of reading (loading) video from the cache, so the bandwidth bottleneck destroys the speed gain brought by parallel computing

Method used

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  • Fast connected domain labeling method based on FPGA Raster Scan mode
  • Fast connected domain labeling method based on FPGA Raster Scan mode
  • Fast connected domain labeling method based on FPGA Raster Scan mode

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Embodiment Construction

[0044] Depend on Figure 1-Figure 3 A fast connected domain labeling method based on the FPGA Raster Scan method shown includes the following steps:

[0045] Step 1: Establish a video acquisition module, a video buffer module, a video processing module and a communication module, and the video acquisition module, the video buffer module, the video processing module and the communication module communicate with each other through data lines;

[0046] Step 2: the video capture module collects video stream data, and transmits the video stream data to the video cache module for caching;

[0047] Step 3: the video processing module reads a frame of image in the video stream data from the video cache module;

[0048] Step 4: When scanning the image line by line from top to bottom, set the current row that is being scanned, and set the array Row_0_Tab[M_Cnt] to store the column number of the pixel in the previous row adjacent to the current row, and the array Row_1_Tab [M_Cnt] is u...

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Abstract

The invention discloses a fast connected domain labeling method based on an FPGA Raster Scan mode, and belongs to the technical field of image processing, a video acquisition module, a video caching module, a video processing module and a communication module are established, a fast neighborhood labeling Raster Scan scanning processing mode is adopted, the problem that a labeling processing mode based on a Raster Scan neighborhood is adopted is solved, the technical problems of reducing the occupation of FPGA hardware resources and improving the processing speed are solved, a communication region labeling algorithm is subjected to step-by-step modular processing, so that each step is relatively independent, the calculation complexity is simplified, the system delay is reduced, an FPGA hardware implementation mode is adopted, the powerful capabilities of FPGA matrix conversion and parallelism are fully exerted, the occupied resource design is few, combination with other modules is convenient, and when a video stream image is processed, labeling algorithm processing is synchronously carried out in the process of reading or loading the video from the cache, and the speed gain brought by parallel computing is fully utilized.

Description

technical field [0001] The invention belongs to the technical field of image processing, in particular to a fast connected domain marking method based on FPGA Raster Scan mode. Background technique [0002] In the field of image processing, a binary image, as the name implies, means that the brightness value of the image has only two states: black (0) and white (255). Binary image plays an important role in image analysis and recognition, because its pattern is simple and has a strong expressive force on the spatial relationship of pixels. In practical applications, the analysis of many images is finally converted to the analysis of binary images, such as: medical image analysis, foreground detection, character recognition, and shape recognition. Binarization + mathematical morphology can solve many target extraction problems in computer recognition engineering. [0003] The most important method of binary image analysis is connected area marking, which is the basis of all...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T7/187G06T1/60G06T1/20G06T7/62
CPCG06T7/187G06T1/60G06T7/62G06T1/20G06T2207/30204G06T2207/30242
Inventor 顾先军陈尔康
Owner 南京威翔科技有限公司