Method for forming semiconductor device

Abstract

A method of forming a semiconductor device is disclosed. An exemplary semiconductor device includes a first semiconductor stack and a second semiconductor stack on a substrate, where each of the first semiconductor stack and the second semiconductor stack includes semiconductor layers stacked upward and separated from each other, a dummy spacer between the first semiconductor stack and the second semiconductor stack, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first semiconductor stack and the second semiconductor stack, and a gate structure wraps the second side wall, the upper surface and the lower surface of each semiconductor layer of the first semiconductor stack and the second semiconductor stack.

Description

technical field [0001] Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof, and more particularly to a manufacturing method of a fin field effect transistor or other three-dimensional semiconductor devices. Background technique [0002] The integrated circuit industry has experienced exponential growth. Technological advances in integrated circuit materials and design have resulted in each generation of integrated circuits having smaller and more complex circuits than the previous generation. In the evolution of integrated circuits, functional density (eg, the number of interconnect devices per chip area) generally increases as geometric size (eg, the smallest component or circuit that can be produced by the manufacturing process employed) decreases. A shrinking process is often beneficial for increased throughput and lower associated costs. [0003] Shrinking dimensions also increase the complexity of handling and manuf...

AI Technical Summary

Problems solved by technology

While existing FinFET devices and methods of fabricating FinFET devices are generally suitable for their intended purposes, they do not meet all requirements

For example, current FinFET devices face the problem of gate leakage current, which is expected to increase power consumption and reduce the reliability of integrated circuits, deteriorating the performance of FinFETs

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