Flexible and agile high-accuracy carrier generation system and method

A high-accuracy, system-generating technology, applied in transmission systems, sinusoidal oscillator train generators, digital-to-analog converters, etc., can solve problems such as inflexibility of agile methods, carrier phase jitter, small dynamic range, etc., to reduce processing Difficulty in clock speed and timing design, large dynamic range, and high degree of software

Pending Publication Date: 2022-03-08
XIAN INSTITUE OF SPACE RADIO TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The technical problem solved by the present invention is: to overcome the deficiencies of the prior art, combined with the principle of direct digital synthesis (DDS), propose a carrier generation system and method of a parallel two-stage cumulative sine output DDS structure, so as to solve the problem of communication, navigation radio frequency Frequency hopping signal carrier phase jitter, large in-band spurs, inflexible agility and small dynamic range, provide solutions for software radio

Method used

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  • Flexible and agile high-accuracy carrier generation system and method
  • Flexible and agile high-accuracy carrier generation system and method
  • Flexible and agile high-accuracy carrier generation system and method

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Embodiment

[0072] It is required to be able to accurately generate the carrier signals of the three frequency points of 1575.42MHz, 1191.795MHz, and 1268.52MHz. At the same time, it can be flexibly adjusted within the range of 1.1GHz to 1.6GHz. The frequency generation accuracy is required to be 1KHz, and the in-band (±30MHz) stray Less than -60dB. Design a 1718.64MHz sampling clock, the bit width N of the first-stage accumulator is 14, the bit width M of the second-stage accumulator that meets the generation accuracy is 17, and the quantization bit width L of the sine storage table is 12.

[0073] Calculate the parameters of the 3 frequency points that need to be generated:

[0074] 1718.64-1575.42=143.22, 214*143.22 / 1718.64=1365+1 / 3, then the corresponding K=1365, m=1, p=3.

[0075] 1718.64-1191.795=526.845, 214*526.845 / 1718.64=5022+10 / 21, then the corresponding K=5022, m=10, p=21.

[0076] 1718.64-1268.52=450.12, 214*450.12 / 1718.64=4291+1 / 21, then the corresponding K=4291, m=1, p=21...

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Abstract

The invention discloses a flexible and agile high-accuracy carrier generation system and method, and the method comprises the steps: determining a carrier generation control parameter according to a sampling frequency and a carrier frequency, placing the control parameter into a digital carrier generation module to generate a parallel digital intermediate frequency carrier signal, converting the parallel digital intermediate frequency signal into an analog radio frequency carrier signal through a high-speed DA, and outputting the analog radio frequency carrier signal. The radio frequency carrier wave generated by the invention has smaller phase jitter and in-band stray, carrier wave frequency adjustment with faster response time and larger dynamic range can be realized, and the integration degree and the software degree are higher.

Description

technical field [0001] The invention belongs to the technical field of carrier wave generation, in particular to a flexible and agile high-accuracy carrier wave generation system and method. Background technique [0002] The flexible and variable frequency of the radio frequency transmission signal can improve its anti-interference ability. The flexible and agility of the frequency requires the flexible and adjustable carrier frequency and supports a large range of agility. Direct digital synthesis (DDS) structure and high conversion rate can be used. The DAC implements the signal generation. However, the digital carrier generated by the traditional DDS structure will have the problem of large phase jitter or many spurs in the band, and the RF signal is often located in the L-band or higher. The sampling rate of this method is too high, and it is often difficult to support the timing of the FPGA side. Contents of the invention [0003] The technical problem solved by the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K3/80H03M1/66H03M9/00H04B1/04
CPCH03K3/80H03M9/00H03M1/66H04B1/04
Inventor 蔡明圭苏哲王磊戚楠王瑛李毅松梁银
Owner XIAN INSTITUE OF SPACE RADIO TECH
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