Preparation method of doped semiconductor device and semiconductor device
A semiconductor and device technology, which is applied in the preparation method of doped semiconductor devices and the field of semiconductor devices, can solve the problems of expensive ion implantation equipment, cumbersome process, side etching, etc., and achieve good etching uniformity, good safety, and reduced The effect of using
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no. 1 example
[0042] figure 1 A flowchart showing a method for preparing a doped semiconductor device provided in the present application.
[0043] See figure 1 As shown, the embodiment of the present application provides a method for preparing a doped semiconductor device, comprising the following steps:
[0044] S001, providing a substrate 1, and growing a first oxide layer 4 on the front and back of the substrate 1 respectively;
[0045] S002, etching off the first oxide layer 4 on the back side of the substrate 1 and the first oxide layer 4 on the front side of the substrate 1 by wet etching;
[0046] S003, coating the front and back of the substrate 1 and the front and side of the first oxide layer 4 to form a first doped region 21;
[0047] S004, performing high-temperature push junction on the front and back of the substrate 1, and growing the second oxide layer 5 on the front of the first oxide layer 4, the front of the first doped region 21, and the back of the first doped regio...
no. 2 example
[0078] read on image 3 As shown, this embodiment provides a semiconductor device, which is manufactured by the method for preparing a doped semiconductor device. The semiconductor device includes: a substrate 1; a first doped region 21 doped in the substrate 1 the back side and the peripheral side of the front side of the substrate 1; the second doped region 22 is doped in the center of the front side of the substrate 1; the first oxide layer 4 is formed on the front side of the substrate 1; and, The second oxide layer 5 is formed on the side of the first oxide layer 4 away from the substrate 1 .
[0079] Wherein, the first doped region 21 is a P+ doped region, and the second doped region 22 is an N+ doped region. The back side of the substrate 1 is doped to form a P+ doped region, and an N+ doped region is generated at the front center of the substrate 1, and the periphery of the N+ doped region is a P+ doped region, so that when the semiconductor device is working, it can ...
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