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Preparation method of buffer layer of epitaxial structure and preparation method of gallium nitride epitaxial layer

An epitaxial structure and buffer layer technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as easy pre-reaction, improve lattice mismatch, relieve stress, and improve growth environment. Effect

Pending Publication Date: 2022-07-12
SEMICON MFG ELECTRONICS (SHAOXING) CORP
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  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to provide a method for preparing a buffer layer with an epitaxial structure, so as to solve the problem in the prior art that the pre-reaction phenomenon is prone to occur when the MOCVD process is performed to epitaxially grow aluminum nitride

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  • Preparation method of buffer layer of epitaxial structure and preparation method of gallium nitride epitaxial layer
  • Preparation method of buffer layer of epitaxial structure and preparation method of gallium nitride epitaxial layer

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Embodiment Construction

[0026] Attached to the following Figure 1-Figure 2 The epitaxial structure and its preparation method, and the preparation method of the gallium nitride-based power device proposed by the present invention are further described in detail with specific embodiments. figure 1 It is a schematic flowchart of a method for preparing a buffer layer in an epitaxial structure according to an embodiment of the present invention, figure 2 It is a schematic diagram of an epitaxial structure in an embodiment of the present invention. The advantages and features of the present invention will become more apparent from the following description. It should be noted that, the accompanying drawings are all in a very simplified form and in inaccurate scales, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the present invention. It should be appreciated that relative terms such as "above," "below," "top," "bottom," "over," and "under" as shown in ...

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Abstract

The invention provides a preparation method of a buffer layer of an epitaxial structure and a preparation method of a gallium nitride epitaxial layer. The first aluminum nitride layer is prepared by executing at least two atomic layer deposition processes, and before each atomic layer deposition process, the surface of the current film layer is subjected to micro-etching treatment so as to remove defects, particles and the like existing on the surface of the current film layer, so that the lattice quality of the current film layer can be effectively improved; compared with the prior art, a better growth environment is provided for the growth of a subsequent film layer, and the pre-reaction problem existing when the aluminum nitride layer is prepared by utilizing an MOCVD process in the prior art is also avoided, so that various defects caused by the pre-reaction problem can be reduced, and the crystal quality is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a preparation method of a buffer layer of an epitaxial structure, a preparation method of a gallium nitride epitaxial layer and a preparation method of a gallium nitride based power device. Background technique [0002] In the field of semiconductor technology, in order to optimize device performance and meet the manufacturing requirements of high-frequency and high-power devices, epitaxial growth technology is widely used. For example, some III-V compounds have good application prospects due to their large band gap, high breakdown electric field, high thermal conductivity, and high electron saturation rate, and these III-V compounds are usually epitaxial Grown on foreign substrates (eg silicon substrates). However, there are problems such as lattice mismatch and thermal mismatch between III-V compounds and heterosubstrates, so that the III-V compounds grown by heteroepit...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/335H01L21/205H01L29/20H01L29/778
CPCH01L21/02381H01L21/02458H01L21/0254H01L21/02502H01L21/02505H01L29/2003H01L29/66462H01L29/778
Inventor 邢国兵
Owner SEMICON MFG ELECTRONICS (SHAOXING) CORP
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