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Formation method of semiconductor structure

A technology of semiconductor and graphic structure, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc. It can solve the problems that the performance of semiconductor structures needs to be further improved, so as to improve the accuracy of graphic transmission, improve performance, The effect of improving quality

Pending Publication Date: 2022-07-12
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the current process of forming the barrier structure (MOC) of the zeroth metal layer is complicated, and the performance of the formed semiconductor structure needs to be further improved

Method used

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  • Formation method of semiconductor structure

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Embodiment Construction

[0027] It can be known from the background art that the performance of the semiconductor structure formed by the current method for forming the zeroth metal layer cut-off structure (MOC) still needs to be improved. The reasons will now be described with reference to specific embodiments.

[0028] refer to figure 1 , a substrate 100 is provided, a dielectric layer 101 is formed on the substrate 100 ; a transition layer 102 and a sacrificial layer 103 located on the transition layer 102 are formed on the dielectric layer 101 .

[0029] After the sacrificial layer 103 is formed, ion implantation is performed on the sacrificial layer 103 for multiple times to form a plurality of mutually separated modified layers in the sacrificial layer 103 respectively.

[0030] refer to figure 2 In this embodiment, the formation of four modified layers is taken as an example for description. The step of forming a single modified layer includes: forming a first patterned layer 104 on the sac...

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Abstract

A method for forming a semiconductor structure comprises the following steps: providing a substrate on which a dielectric layer is formed; forming a transition layer on the dielectric layer and a sacrificial layer on the transition layer; performing multiple times of ion implantation on the sacrificial layer, and respectively forming a plurality of mutually separated modified layers in the sacrificial layer; removing the residual sacrificial layer, and forming a first pattern structure on the transition layer; forming a second pattern structure on the transition layer, wherein the second pattern structure is separated from the first pattern structure; and etching the transition layer by taking the first pattern structure and the second pattern structure as masks until the surface of the dielectric layer is exposed, and forming mutually separated cut-off patterns on the dielectric layer. According to the semiconductor structure forming method provided by the embodiment of the invention, the technological process is simplified, and the performance of the formed semiconductor structure can be improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure. Background technique [0002] The metal interconnect structure is an indispensable structure in semiconductor devices, which is used to realize the interconnection between active regions and active regions, the interconnection between transistors and transistors, or the interconnection between different layers of metal lines. Complete signal transmission and control. Therefore, in the semiconductor manufacturing process, the formation of the metal interconnect structure has a great influence on the performance of the semiconductor device and the semiconductor manufacturing cost. In order to increase the density of the devices, the size of semiconductor devices in integrated circuits has been continuously reduced, and in order to realize the electrical connection of the individual semiconductor devic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L23/528
CPCH01L23/5283H01L21/76847H01L21/76892
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP
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