DC offset cancellation circuit and method

Abstract

The invention discloses a DC offset cancellation circuit and method. The DC offset cancellation circuit comprises an offset cancellation module, an amplifier group and a phase inverter structure, the inverter structures are connected between the two amplifier groups, one end of each amplifier group is connected with a signal input end, and the other end of each amplifier group is connected with a signal output end; an offset elimination module is arranged between the input end and the output end of each amplifier group; the structure of the circuit is different from an existing offset elimination circuit structure, common-mode voltage can be corrected, differential-mode offset can be corrected, and the working reliability of the circuit is improved. An output DC point is stabilized at an optimal bias point in a single-end bias mode, and for an amplifier with an inverter structure, it can be ensured that the amplifier works in a state with the best linearity, and then the requirement for the linearity of a whole circuit is met. Static power consumption can be greatly reduced by the Class AB output stage, waste of current on a transconductance tube is avoided, and the driving capability is much stronger than that of a single transconductance tube.

Description

technical field [0001] The invention belongs to the technical field of optical communication chip design, and in particular relates to a DC offset elimination circuit and method. Background technique [0002] With the increase of data transmission rate year by year, optical carrier plays an important role in the field of communication with its huge capacity. In the optical communication system, the optical receiver is used to convert the current signal into a voltage signal, amplify the current into a voltage signal through a transimpedance amplifier, and then amplify the output through the post-stage. missing role. Especially for the amplifier circuit with inverter structure, if the circuit has a relatively large differential mode offset, due to the large gain from the pre-stage to the output, the output may be saturated eventually, thus affecting the performance of the circuit. [0003] In order to solve this problem, the existing method adopts two single-ended inverter ...

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Problems solved by technology

[0004] The purpose of the present invention is to provide a DC offset elimination circuit and method, which not only realizes the calibration of the differential mode offset, but also realizes the correction of the common mode voltage, and also solves the problem that the existing offset elimination structure does not consider low power consumption. Therefore, the problem of large quiescent current

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