Image coding integrated circuit to lower power consumption according to target data
An integrated circuit, image coding technology, applied in data processing power supply, image communication, processor architecture/configuration, etc., can solve the problem of wasting circuit working power, and achieve the effect of reducing power consumption
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Embodiment 1
[0046] Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0047] FIG. 1 is a schematic block diagram of the structure of an image coding integrated circuit 1000 according to Embodiment 1 of the present invention.
[0048]The image coding integrated circuit 1000 includes: a digital signal processor part (hereinafter referred to as a DSP part) 10, which is used for processing such as audio coding; a main interface part 11, which receives a control signal from a main system using the image coding integrated circuit 1000; Video interface section 12, carries out video signal transmission and reception with the outside of image coding integrated circuit 1000; In-loop processing section 13, in MPEG2 encoding, performs in-loop processing such as discrete cosine transform (Discrete Cosine Transform: DCT) processing and quantization processing; The motion prediction unit 14 is used for motion prediction and compensates the video signal ...
Embodiment 2
[0090] In Embodiment 1, the image coding integrated circuit 1000 adopts a structure capable of processing SDTV images.
[0091] In Embodiment 2, the image encoding integrated circuit 1000 has a processing capability for encoding HDTV images (1080I: an interlaced image signal with 1,080 scanning lines).
[0092] That is, it has the ability to process 8160 macroblocks within 1 / 30 second.
[0093] In Embodiment 2, a configuration will be described in which power consumption can be reduced in accordance with applications in the image coding integrated circuit 1000 capable of increasing the image quality by expanding the prediction range of the motion predictor 14 .
[0094] As described above, when processing is performed by extending the prediction range, it is necessary to increase the degree of parallelism of the prediction processing circuit in proportion to the prediction range, or to increase the operating frequency to improve performance.
[0095] FIG. 6 is a schematic blo...
Embodiment 3
[0124] FIG. 10 is a schematic block diagram of the structure of an image coding integrated circuit 1010 according to Embodiment 3 of the present invention.
[0125] Referring to Fig. 10, the image coding integrated circuit 1010 includes a DSP part 10, a main interface part 11, a video interface part 12, an in-loop processing part 13, a motion prediction part 14, a variable length coding part 15, a bit stream interface part 16, an audio interface part 17, DRAM interface part 18, general control part 19 and mutual communication interface 191.
[0126] That is, in addition to the configuration of the image coding integrated circuit 1000 of the first embodiment shown in FIG. 1, a mutual communication interface 191 is provided.
[0127] The intercommunication interface 191 is used for mutual transmission of required data when multi-chips are working. For example, it is an interface that can exchange reconstructed images required for motion prediction.
[0128] FIG. 11 is a schema...
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