Method for forming self alignment contact window

Abstract

The invention is a self-aligning contact window forming method, including: arranging at least a grid-superposed structure on a semiconductor substrate; forming a first dielectric layer on them; forming a second dielectric layer on the first one, where the second one has etching selectivity relative to the first one; etching the second dielectric layer to expose the first dielectric layer formed on the top surface of the grid- superposed structure and at the upper part of partial side wall of the grid-superposed structure; eliminating the exposed dielectric layer; and forming a third dielectric layer on the side wall of the grid-superposed structure.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for forming a self-aligned contact window in the semiconductor integrated circuit. Background technique [0002] A field effect transistor (FET) generally includes: an insulating layer formed on a semiconductor substrate, a polysilicon gate formed on the insulating layer, a pair of source / drain regions formed in the semiconductor substrate, and a gate electrode formed on the gate A channel region under the insulating layer and separated by the source / drain region. In the field effect transistor manufacturing process, traditional flash memory technology includes the metallization process of the source / gate electron pair of the circuit. The metallization process includes disposing a patterned masking layer on the semiconductor substrate and exposing source or drain regions formed in the semiconductor substrate. In particular, openings are f...

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Problems solved by technology

Since the dielectric layer 32 and the buffer layer 30 are made of silicon oxide, the etching gas or etching solution used in the etching of the contact window or the cleaning of the contact window will also damage the buffer layer 30 located between the gate stack structure 14 and the sidewall layer 22 , and the metal layer 28 is exposed, resulting in a short circuit between the metal layer 28 and the contact metal filled in the opening 34

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