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Semiconductor baseplate and its fabrication process

A manufacturing process and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of high manufacturing cost and low manufacturing qualification rate

Inactive Publication Date: 2002-08-07
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, although the flip-chip ball grid array substrate manufactured by the build-up method has the advantages of high density and low pitch, the substrate manufactured by the build-up method has the disadvantages of low manufacturing yield and high manufacturing cost

Method used

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  • Semiconductor baseplate and its fabrication process
  • Semiconductor baseplate and its fabrication process
  • Semiconductor baseplate and its fabrication process

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Experimental program
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Embodiment Construction

[0033] Please refer to figure 2 , which is a schematic cross-sectional view of a semiconductor package substrate according to a preferred embodiment of the present invention. The semiconductor package substrate 200 utilizes an insulating core layer 202, the material of which includes glass epoxy resin, bismaleimide and epoxy resin, etc., and patterned wires are respectively arranged on the upper and lower surfaces of the insulating core layer 202. layers 204 , 206 , and the wiring layers 204 , 206 are formed by patterning a copper foil layer that was originally disposed on the surface of the insulating core layer 202 . Next, provide an insulating board 208 with a patterned wire layer 212 on one side, and an insulating board 210 with a patterned wire layer 214 on one side, use the lamination method to position and press the above layers, and then use mechanical drilling The plated-through plug 216 is formed by using the method and electroplating manufacturing process, thereby...

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Abstract

The present invention relates to a semiconductor base plate and its preparation process. Its utilizes stacking process to implement internal stacked circuit structure, then utilizes lamination process to implement external laminated circuit structure to provide high-density low-spacing semiconductor structure base plate. Besides, the lug pads are divided into power supplyl grounding lug pads, first signal lug pads and second signal lug pads, in which these power supply / groundikng lug pads are positioned on the centre of base plate, these first signal lug pads are distributed around periphery of these power supply / grounding lug pads, and these second signal lug pads are distributed armount the periphery of these first signal lug pads.

Description

technical field [0001] The present invention relates to a semiconductor assembly substrate and its manufacturing process, and in particular to a semiconductor assembly substrate applied to a flip-chip ball lattice array and its manufacturing process. technical background [0002] Flip chip technology (Flip Chip, F / C) is a construction technology that is often used in chip size construction. It uses an area array to configure pads on the active surface of the chip. And a bump is formed on the pad to connect the chip and the carrier, so it has the advantages of reducing the construction area, increasing the construction density, and shortening the signal transmission path. Because the rigid substrate can provide high-density and high-contact circuit arrangement at the same time, it is a carrier often used in many flip-chip structures. The manufacturing methods of rigid substrates can be mainly divided into two categories: laminate and build-up. [0003] The production princi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/48H01L21/60H01L23/14H05K1/00H05K3/46
CPCH01L2924/0002
Inventor 许志行张文远
Owner VIA TECH INC