Two-bit ROM unit of nitride and its manufacture and read method

A technology of read-only storage and manufacturing method, which is applied in the field of two-bit nitride read-only memory cells, and can solve problems such as the increase of the critical voltage of the memory cell and the inability to open the channel 26

Inactive Publication Date: 2004-09-08
POWERCHIP SEMICON CORP
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Problems solved by technology

When there is charge in the charge storage region 28 or 30 (i.e. programmed), the threshold voltage of the memory cell will increase
Therefore, when a programmed bit is intended to be read, the read voltage applied to the gate conductive layer 24 will not be able to open the channel 26 and form a conduction

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  • Two-bit ROM unit of nitride and its manufacture and read method
  • Two-bit ROM unit of nitride and its manufacture and read method
  • Two-bit ROM unit of nitride and its manufacture and read method

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Embodiment Construction

[0035] Manufacturing method and structure of a two-bit nitride read-only memory cell with a parasitic amplifier:

[0036] The manufacturing method of the two-bit nitride read-only memory cell with parasitic amplifier of the present invention will cooperate with Figure 2 to Figure 7 Make a detailed description as follows. At figure 2 In this method, firstly, a semiconductor substrate is provided, for example, a silicon substrate 100 made of p-type silicon material here. Next, a masking layer 102 is formed on the surface of the silicon substrate 100 to define the memory cell area, and its material is, for example, photoresist (PR). Then perform an ion implantation process 104 and use the above-mentioned shielding layer 102 as an ion implant mask (implant mask), implant n-type ions such as phosphorus (P) with an energy between 300-2000KeV to form an ion in the silicon substrate 100. The first well region 106, the first well region 106 is an n-type well region doped with n-ty...

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Abstract

The present invention relates to one kind of two-bit nitride ROM unit with parasitical amplifier and its manufacture and read method. The ROM unit includes one semiconductor substrate; one first well area inside the semiconductor substrate and in the electric polarity opposite to the semiconductor substrate; one second well area inside the first well area and with opposite electric polarity; one grid dielectric layer on partial surface of the second well area and connecting one nitride layer; one conducting layer on the grid dielectric layer and constituting one grid together with the grid dielectric layer; and one pair of first doped areas set symmetrically on two sides of the grid inside the second well area, contacting partially to the grid area and with the electric polarity opposite to the second well area. The first well area and the second well area of the first doped area and the first well area constitute one parasitic current amplifier.

Description

technical field [0001] The present invention relates to a kind of non-volatile memory unit and its manufacturing method, especially to a kind of two-bit nitride read-only memory cell (Nitride Read Only memory cell; NROM cell) with parasitic amplifier, its manufacturing method and read The method for storing the state can simply and clearly distinguish the storage state of each bit in the two-bit nitride read-only memory unit. Background technique [0002] In the non-volatile memory industry, the development of nitride read-only memory cells (NROM cells) originated in 1996 AD. This new non-volatile memory technology uses an oxide-nitride-oxide (ONO) layer as the gate dielectric layer (gate dielectric) and is programmed and erased by existing mechanisms. Each memory cell is created to have two separate bits. Therefore, the bit size of the nitride read-only memory cell is about half of the entire memory cell area. Since silicon die size is a major factor in the cost structur...

Claims

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Application Information

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IPC IPC(8): G11C11/40G11C16/02H01L27/112
Inventor 黄丘宗洪至伟
Owner POWERCHIP SEMICON CORP
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