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Method for producing a stepped edge profile comprised of a layered construction

A step-and-configuration technology, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems of adverse effects on semiconductor chip performance, damage, and difficulty in removal, so as to achieve environmentally friendly implementation, Economical implementation, reduced complexity effects

Inactive Publication Date: 2005-12-07
HITACHI ENERGY SWITZERLAND AG
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] When forming the Ti / Ni / Ag layer sequence by etching, care should be taken not to form an underetched area, because dirt or deposits can form in such areas during the manufacturing process or during operation of the semiconductor chip, which are difficult to remove and can Adversely affect the working performance of the semiconductor chip, and even cause its damage

Method used

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  • Method for producing a stepped edge profile comprised of a layered construction
  • Method for producing a stepped edge profile comprised of a layered construction
  • Method for producing a stepped edge profile comprised of a layered construction

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Embodiment Construction

[0017] The symbols used in the drawings and their meanings are summarized in the symbol table. In principle, the same reference numerals denote the same parts.

[0018] figure 1 The initial product of the method according to the invention is shown, comprising a layer array 2 laid on a semiconductor chip 1, said layer array 2 consisting of an Ag layer (aluminum layer) 21 as a first layer, an Ag layer (aluminum layer) 21 as a second layer, A Ni layer (nickel layer) 22, and a Ti layer (titanium layer) 23 as a third layer are constituted. The first thickness d1 of the Ag layer 21 is preferably a few microns, the second thickness d2 of the Ni layer 22 and the third thickness d3 of the Ti layer are preferably a few tenths of a micron. Part of the Ag layer 21 is covered by a photosensitive varnish layer 3 as its protective layer.

[0019] In order to form a stepped configuration in Smeme 2, hydrogen peroxide (H 2 o 2 ), ammonium hydroxide (NH 4 OH) and water (H 2 The first che...

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Abstract

The invention relates to a method for forming a stepped edge profile comprised of a layered construction (2) involving a first structuring step during which a portion of the first layered construction part (21) is removed whereby producing a remaining first layered construction part (211). During a second structuring step, a portion of the second layered construction part (22) that is located underneath said first layered construction part (21) is partially removed by etching effected by a second etching agent. During a third structuring step, a portion of the third layered construction part (23) that is located underneath the second layered construction part (22) is partially removed by etching effected by a third etching agent. The invention provides that, during the second structuring step, an area of the second layered construction part (22) located underneath the first layered construction part (21) is removed and, during the third structuring step, the first projection (A) of the remaining first layered construction part (211) is removed.

Description

technical field [0001] The present invention relates to the field of semiconductor processing technology. The invention relates to a method for producing a stepped configuration consisting of layers according to claim 1 . Background technique [0002] In order to form the metal layer arranged on the semiconductor, many known techniques are generally used in successive formation steps. In this case, a photosensitive varnish is often first applied as a protective layer on a metal layer or a metal layer row. The resulting photosensitive lacquer layer is then exposed through a first exposure mask. Next, depending on the properties of the photosensitive varnish, either the exposed or unexposed areas of the photosensitive varnish can be removed, leaving unexposed or exposed areas. [0003] The metal layer or metal layer sequence is then etched in one or more forming steps. Various etching methods are available here: etching in aqueous solution, dry etching, reactive ion etchin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3213H01L23/485
CPCH01L21/32134H01L21/32139
Inventor 杰罗姆·阿萨尔西蒙·艾歇尔埃里希·南塞
Owner HITACHI ENERGY SWITZERLAND AG
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