Fin field effect transistor memory cell, fin field effect transistor memory cell arrangement, and method for the production of a fin field effect transistor memory cell

A fin-type field effect and storage unit technology, which is applied in transistors, semiconductor/solid-state device manufacturing, information storage, etc., can solve the problems of low size application flexibility, high voltage, and low read current, and achieve the best size application effect
CN1751392AInactive Publication Date: 2006-03-22INFINEON TECH AG
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
INFINEON TECH AG
Publication Date
2006-03-22
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention relates to a fin field effect transistor memory cell (200), a fin field effect transistor memory cell arrangement, and a method for producing a fin field effect transistor memory cell. Said fin field effect transistor memory cell comprises a first (201) and a second (202) source / drain area and a gate area. The memory cell further comprises a semiconductor fin (204) encompassing the channel zone between the first and the second source / drain area. Also provided is a charge storage layer (207, 208) that is disposed at least in part on the gate area. A wordline area (205, 206) is arranged in at least one sector of the charge storage layer. The charge storage layer is designed such that electric charge carriers can be selectively introduced into or removed from the charge storage layer by applying predefined electrical potentials to the fin field effect transistor memory cell.
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Description

technical field

[0001] The present invention relates to a FinFET memory cell, a FinFET memory cell configuration and a method for manufacturing a FinFET memory cell. Background technique

[0002] Due to the rapid development of computer technology, a high-density, low-power, and non-volatile memory is required, especially for mobile devices for data storage.

[0003] A floating gate memory is disclosed in the prior art, in which a conductive floating gate region is disposed on a gate insulating layer of a field effect transistor integrated in a substrate, and the Fuller-Nordham through Tunneling (Fowler-Nordheim Tunneling) can permanently introduce charge carriers into the floating gate region. Due to field effects, the threshold voltage value of such a transistor is related to whether charge carriers are stored in the floating gate, and therefore, items of memory information can be encoded as charge carriers in the floating gate layer existence or non-existence.

[0004] ...

Claims

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