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Circuit for detecting phase-error and generating control signal

A technology for controlling signals and detecting phases, applied in the measurement of electrical variables, automatic control of power, phase angle between voltage and current, etc., to achieve the effect of small chip area

Active Publication Date: 2006-08-09
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the output signal of the loop filter 15 of the phase-locked loop 20 is still an analog signal, and the loop filter 15 belongs to a low-pass filter, requiring a larger area to implement the loop filter 15

Method used

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  • Circuit for detecting phase-error and generating control signal
  • Circuit for detecting phase-error and generating control signal
  • Circuit for detecting phase-error and generating control signal

Examples

Experimental program
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Embodiment Construction

[0039] The circuit for detecting a phase error and generating a control signal, and a phase-locked loop and a delay-locked loop using the circuit of the present invention will be described in detail below with reference to the accompanying drawings.

[0040] Fig. 3 shows a block diagram of a phase-locked loop applying the circuit of the present invention to detect phase error and generate a control signal. As shown in the figure, the phase-locked loop 30 includes a circuit (hereinafter referred to as the phase measurement circuit) 31 for detecting phase error and generating a control signal, a digital-to-analog converter (Digital to Analog Converter, DAC) 32, and a voltage-controlled oscillator device 16. The phase measurement circuit 31 receives a reference signal Fref and an oscillating clock Fvco, and generates a control data according to their phase difference. Afterwards, the phase-locked loop 30 utilizes the digital-to-analog converter 32 to convert the control data int...

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PUM

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Abstract

Being applied to phase locked loop, the disclosed circuit includes a digital phase detector, and a digital filter. Receiving two input signals, the digital phase detector generates a set of control signal of phase difference based on phase error. The digital filter includes a correspondence table, an adder, and a register. Receiving the control signal of phase difference, the correspondence table outputs a corresponding value. Receiving the corresponding value and a value of register, the adder generates control data. Receiving and storing the control data, the register outputs the data stored as the value of the register. The correspondence table can be as a memory, and control signal of phase difference is as its address information. Chip area of phase locked loop of using the disclosed circuit is smaller than area of traditional circuit.

Description

technical field [0001] The invention relates to a circuit for detecting phase error and generating a control signal, in particular to a circuit for detecting phase error and generating a control signal processed in a digital mode, which is applied to a phase-locked loop or a delay-locked loop. Background technique [0002] Generally, traditional phase-locked loops include analog phase-locked loops and digital phase-locked loops. The phase detector of the phase-locked loop shown in Figure 1 is an analog phase detector, and the phase detector of the phase-locked loop shown in Figure 2 detector is a digital phase detector. [0003] The phase locked loop 10 of Fig. 1 comprises a phase detector (Phase Detector) 13, a charge pump (Charge Pump) 14, a loop filter (Loop Filter) 15, and a voltage controlled oscillator (Voltage Control Oscillator, VCO )16. The phase detector 13 is used to detect the phase difference between the input signal (Fref) and the phase-locked clock (Fvco), a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/08H03L7/093G01R25/00
Inventor 黄祯治
Owner REALTEK SEMICON CORP