Method for making macroporous silicon micro-channel with high aspect ratio

A technology with high aspect ratio and fabrication method is applied in the field of fabricating silicon microchannels and macroporous silicon microchannels with high aspect ratio, which can solve the problems of corrosion current destroying the structure, etc., and achieve easy-to-obtain aspect ratio and high aspect ratio. Effect

Inactive Publication Date: 2006-09-27
EAST CHINA NORMAL UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when the required pore size is large, too much corrosion current will destroy the originally designed structure

Method used

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  • Method for making macroporous silicon micro-channel with high aspect ratio
  • Method for making macroporous silicon micro-channel with high aspect ratio

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] 1. Select n(100) silicon with a resistivity of 1 ohm / cm;

[0034] 2. Using LPCVD low stress silicon nitride (Si 3 N 4 ) as a mask;

[0035] 3. After defining the window (6μm×6μm) array by photolithography, take it out and clean it; then treat it with cetyltrimethylammonium bromide (TMAOH 25% 85°C) for 1 minute;

[0036] 4. Rinse and dry with deionized water, then use 40% HF and absolute ethanol C 2 h 5 The mixed solution obtained by mixing OH in a ratio of 1:7:8 is used as an anodic oxidation solution, and anodic oxidation is performed on the treated silicon wafer. The anodic oxidation is carried out at 20°C, and the average rate of corrosion is 50 μm / h; corrosion 8 Hour;

[0037] 5. Use dry oxidation to form a thin oxygen layer of 0.1 microns for front protection, and use HF solution to etch to remove the back oxide layer;

[0038] 6. Corrode with TMAOH (25wt%85°C) on the back side of the silicon wafer, and determine the end point of the back side thinning accord...

Embodiment 2

[0041] 1. Select p(100) silicon with a resistivity of 25 ohms / cm;

[0042] 2. Using LPCVD low stress silicon dioxide (SiO 2 ) as a mask;

[0043] 3. After defining the window (6μm×6μm) array by photolithography, take it out and clean it; then use KOH (20wt% 60°C) for 3 minutes;

[0044] 4. Rinse and dry with deionized water, then use hydrofluoric acid (HF), water and dimethylformamide (DMF) to mix the resulting solution in a ratio of 1:7:8 as an anodic oxidation solution. The silicon wafer is anodized, and the anodization is carried out at 20°C, and the corrosion is performed for 2 hours;

[0045] 5. Use dry oxidation to generate a thin oxygen layer of 0.1 microns for front protection; use hydrofluoric acid (HF) to etch to remove the back oxide layer;

[0046] 6. Corrode the back side of the silicon wafer with KOH (20wt% 60° C.), and determine the end point of the back side thinning according to the deep etched microchannel depth and the back side thinning rate;

[0047] 7...

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Abstract

The making process of high depth / width ratio macroporous silicon microchannel includes: 1. an electrochemical process includes the steps of depositing mask to the surface of the substrate and photoetching to define hole positions of silicon chip, rinsing and pre-etching with potassium hydroxide solution or tetramethyl ammonium hydroxide solution for 1-3 min until forming turned rectangular prism, and deep electrochemical etching; 2. structure protection through oxidizing the inner wall of the etched structure or depositing one homogeneous protecting layer in a low pressure chemical vapor deposition process; 3. back thinning through windowing the back and KOH or TMAOH etching until reaching the etched quirks; and 4. ultrasonic separation through pre-treatment after stopping etching and light stirring up and down ultrasonically to separate out macroporous silicon microchannel with high depth / width ratio.

Description

technical field [0001] The invention relates to a method for manufacturing a silicon microchannel, in particular to a method for manufacturing a macroporous silicon microchannel with a high aspect ratio, and belongs to the field of microelectromechanical system technology (MEMS). Background technique [0002] In the manufacture of devices such as microfluidics, microchannels, and three-dimensional integrated circuits, it is often necessary to make deep hole structures on wafers. Therefore, how to obtain a steep deep hole structure has become one of the focuses in the MEMS process. In order to obtain a relatively steep structure, the existing technologies generally have the following types: [0003] 1. Dry process (deep reactive ion etching, etc.). These methods have achieved success in making sensors of mechanical quantities such as gyroscopes and acceleration sensors. However, there are still many defects, such as: 1. Deep reactive ion etching equipment is very expensive...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B81C1/00
Inventor 王连卫吴俊徐
Owner EAST CHINA NORMAL UNIV
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