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Silicon gate etching method

A technology of over-cutting and silicon wafers, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of forming uniform airflow distribution, causing micro-channel effect, charge accumulation effect and other problems, and the method is simple Easy to implement, eliminate micro-channel effect, and avoid variable effects

Active Publication Date: 2006-10-18
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

From the above description of the main steps of the etching process, it can be found that the main etching step, which is an important step in the etching process, has a large overall gas flow rate, and at the same time, the mixed gas is mainly composed of large molecular weight Cl. 2 Composed of HBr and HBr, the overall gas fluidity is poor, especially when performing a 300mm silicon wafer etching process, due to the increase in the size of the silicon wafer, it becomes more difficult to form a uniform gas flow distribution on the surface of the silicon wafer
[0005] In the gate etching process, large molecular weight Cl 2 The main etching step composed of HBr is easy to produce charge accumulation effect, which will cause micro channel effect
The micro-channeling effect is directly proportional to the aspect ratio of the line, so it is more serious in the deep submicron gate etching process

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0017] In the 200mm etch chamber, 200sccm He was injected after the main etching step was completed.

[0018] On the Nmc plasma etching machine, the specific process is as follows:

[0019] Initial etching: 350W / BP40W / 10mT / 100sccm CF4 / 5Sec.

[0020] Main etching: 350W / BP40W / 7mT / 30sccm Cl2 / 160sccm HBr /

[0021] 10 sccm HeO2 / OES.

[0022] New: 350W / BP0W / 80mT / 200sccm He / 5Sec.

[0023] Over etch: 250W / BP80W / 80mT / 160sccm HBr / 10sccm He /

[0024] 10sccm HeO2 / 40Sec.

[0025] We sectioned the etched silicon wafer, and it can be seen through a scanning electron microscope that under the new process conditions, there is no micro-channel phenomenon in the line section.

Embodiment 2

[0027] According to the method described in Example 1, the difference is that 150 sccm He and 20 sccm Ne are fed after the main step is completed.

[0028] We sectioned the etched silicon wafer, and it can be seen through a scanning electron microscope that under the new process conditions, there is no micro-channel phenomenon in the line section.

Embodiment 3

[0030] According to the method described in Example 1, the difference is that 300 sccm Ar is introduced after the main step is completed.

[0031] We sectioned the etched silicon wafer, and it can be seen through a scanning electron microscope that under the new process conditions, there is no micro-channel phenomenon in the line section.

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PUM

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Abstract

The present invention relates to a silicon gate etching method. Said method includes BT step, main etching step and overetching step. It is characterized by that between main etching step and overetching step an inert gas can be added so as to release the charges collected on the silicon wafer and attain the goal of eliminating microchannel effect.

Description

technical field [0001] The invention relates to a method for etching a silicon gate, in particular to a method for etching a deep submicron silicon gate. Background technique [0002] Integrated circuits usually refer to 0.8-0.35 μm as submicron, 0.25 μm and below as deep submicron, and 0.05 μm and below as nanoscale. The key technologies of deep submicron manufacturing mainly include lithography technology, plasma etching technology, ion implantation technology, copper interconnection technology, etc. [0003] As we all know, gaseous plasma technology is widely used in the field of integrated circuit manufacturing, especially in the fields of etching of thin films such as gates, etching of dielectric materials, and removal of photoresist materials. However, despite the wide acceptance of plasma technology in the semiconductor manufacturing industry, the application of this technology continues to face a considerable number of challenges. It is worth pointing out that a la...

Claims

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Application Information

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IPC IPC(8): H01L21/306C23F1/10H01L21/3065
Inventor 孙静
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD