Ferroelectric random access memory capacitor and method for manufacturing the same

Abstract

The method for manufacturing an FeRAM capacitor with a merged top electrode plate line (MTP) structure is employed to prevent a detrimental impact on the FeRAM and to secure a reliable FeRAM device. The method includes steps of: preparing an active matrix obtained by a predetermined process; forming a first conductive layer, a dielectric layer and a second conductive layer on the active matrix in sequence; forming a hard mask on the second conductive layer; patterning the second conductive layer, the dielectric layer and the first conductive layer by using the hard mask, thereby forming a vertical capacitor stack, a width of the capacitor stack being larger than that of the storage node contact; forming a second ILD embracing the capacitor stack; planarizing the second ILD till the top face of the hard mask is exposed; removing the hard mask to form an opening above the top electrode; and forming a plate line of which a width is larger than that of the capacitor stack.

Description

FIELD OF THE INVENTION [0001] The present invention relates to a semiconductor device and a method for manufacturing the same; and, more particularly, to a ferroelectric random access memory (FeRAM) capacitor having a merged top electrode plate line (MTP) structure therein and a method for manufacturing the same. DESCRIPTION OF THE PRIOR ART [0002] With the recent progress of film deposition techniques, researches for a nonvolatile memory cell using a ferroelectric thin film have increasingly been developed. This nonvolatile memory cell is a high-speed rewritable nonvolatile characteristic utilizing high-speed polarization / inversion and residual polarization of a ferroelectric capacitor thin film. [0003] Therefore, a ferroelectric random access memory (FeRAM) where a ferroelectric material such as strontium bismuth tantalate (SBT) and lead zirconium titanate (PZT) is increasingly used for the capacitor thin film in place of a conventional silicon oxide film or a silicon nitride film...

AI Technical Summary

Benefits of technology

The present invention provides a FeRAM capacitor with a merged top electrode plate line (MTP) structure that enhances a ferroelectric property and prevents a crack in the ferroelectric layer. The method for manufacturing the FeRAM device with the MTP structure includes a one-step etching for forming a vertical capacitor stack, thereby improving the manufacturing process. The FeRAM capacitor with the MTP structure includes an active matrix, a capacitor stack, a second ILD, and a plate line. The width of the capacitor stack is relatively larger than that of the storage node, and the second ILD encloses the capacitor stack. The method for manufacturing the FeRAM device with the MTP structure includes preparing the active matrix, sequentially forming layers, patterning the layers, and forming the second ILD. The technical effects of the present invention include improving the manufacturing process and enhancing the ferroelectric property of the FeRAM capacitor.

Problems solved by technology

However, the conventional method for manufacturing the FeRAM capacitor as aforementioned suffers from several shortcomings.

In the long run, a ferroelectric property of the FeRAM capacitor becomes deteriorated.

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