Non-volatile memory and method with shared processing for an aggregate of read/write circuits

Inactive Publication Date: 2006-06-29
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0042] According to one aspect of the invention, a processor for processing data between a plurality of sense amplifiers and data latches comprises an input logic, a latch and an output logic. The input logic can transform the data received from either the sense amplifier or the data latches. The

Problems solved by technology

Conventional mass storage, based on rotating magnetic medium such as hard drives and floppy disks, is unsuitable for the mobile and handheld environment.
This is because disk drives tend to be bulky, are prone to mechanical failure and have high latency and high power requirements.
These undesirable attributes make disk-based storage impractical in most mobile and portable applications.
It is often difficult to perform both of these functions in an optimum manner with a single voltage.
Programming of charge storage memory devices can only result in adding more charge to its charge storage elements.
However, as can be seen from FIG. 6A, the circuitry of a read/write module will likely be implemented with many more transistors and circuit elements and therefore will occupy a space over many columns.
However, the interleaving page architecture is disadvantageous in at least t

Method used

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  • Non-volatile memory and method with shared processing for an aggregate of read/write circuits
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  • Non-volatile memory and method with shared processing for an aggregate of read/write circuits

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Embodiment Construction

[0067]FIG. 7A illustrates schematically a compact memory device having a bank of partitioned read / write stacks, in which the improved processor of the present invention is implemented. The memory device includes a two-dimensional array of memory cells 300, control circuitry 310, and read / write circuits 370. The memory array 300 is addressable by word lines via a row decoder 330 and by bit lines via a column decoder 360. The read / write circuits 370 is implemented as a bank of partitioned read / write stacks 400 and allows a block (also referred to as a “page”) of memory cells to be read or programmed in parallel. In a preferred embodiment, a page is constituted from a contiguous row of memory cells. In another embodiment, where a row of memory cells are partitioned into multiple blocks or pages, a block multiplexer 350 is provided to multiplex the read / write circuits 370 to the individual blocks.

[0068] The control circuitry 310 cooperates with the read / write circuits 370 to perform me...

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Abstract

A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has an architecture that reduces redundancy in the multiple read/write circuits to a minimum. The multiple read/write circuits are organized into a bank of similar stacks of components. Redundant circuits such as a processor for processing data among stacks each associated with multiple memory cells are factored out. The processor is implemented with an input logic, a latch and an output logic. The input logic can transform the data received from either the sense amplifier or the data latches. The output logic further processes the transformed data to send to either the sense amplifier or the data latches or to a controller. This provides an infrastructure with maximum versatility and a minimum of components for sophisticated processing of the data sensed and the data to be input or output.

Description

FIELD OF THE INVENTION [0001] This invention relates generally to non-volatile semiconductor memory such as electrically erasable programmable read-only memory (EEPROM) and flash EEPROM, and specifically ones having an aggregate of highly compact and high performance read / write circuits sharing a common processor. BACKGROUND OF THE INVENTION [0002] Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, retaining its stored data even after power is turned off. In spite of the higher cost, flash memory is increasingly being used in mass storage applications. Conventional mass storage, based on rotating magnetic medium such as hard drives and flo...

Claims

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Application Information

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IPC IPC(8): G11C16/06
CPCG11C11/5642G11C16/26
Inventor CERNEA, RAUL-ADRIANLI, YANKHALID, SHAHZADCHAN, SIU LUNG
Owner SANDISK TECH LLC
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