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Method for fabricating etch mask and patterning process using the same

a technology of etching mask and patterning process, which is applied in the field of mask fabrication and patterning process, can solve the problems of limited device dimensions, limited dimension of trimmed photoresist layer, and inability to further reduce the dimension of film layer defined by using photoresist layer, etc., and achieves the effect of improving device integration and further reducing the film dimension

Inactive Publication Date: 2006-08-31
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a method for fabricating a mask with a smaller size than the traditional exposure equipment. This is achieved by using a patterned sacrificial layer over a mask material layer, which has an etch selectivity different from that of the mask material layer. An isotropic etch process is performed to the mask material layer to form a mask layer by using the patterned sacrificial layer as an etch mask. The dimension of the mask layer is smaller than a dimension of the patterned sacrificial layer. The patterned sacrificial layer can be formed by using a patterned photoresist layer as an etch mask, wherein the patterned photoresist layer has a critical dimension (CD) smaller than that of the mask material layer. The material of the mask material layer can be silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material. The use of the patterned sacrificial layer allows for the fabrication of devices with smaller dimensions and improved integration.

Problems solved by technology

Regardless of the improvement methods, the improvement of the device dimensions is restricted by the limitation of the exposure equipment.
Accordingly, to further decrease the dimension of a film layer defined by using the photoresist layer is also limited.
However, the dimension of a trimmed photoresist layer is so small that photoresist layer may collapse because the trimmed photoresist layer cannot withstand stand the stress induced in the subsequent etch process.
As a result, the accuracy of the dimension of the film layer defined by the trimmed photoresist layer is affected.

Method used

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  • Method for fabricating etch mask and patterning process using the same
  • Method for fabricating etch mask and patterning process using the same

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Embodiment Construction

[0019]FIGS. 1A-1D are schematic cross sectional views showing the progression of a patterning process according to an embodiment of the present invention.

[0020] Referring to FIG. 1A, a mask material layer 104 is formed over a material layer 102. The mask material layer 104 has an etch selectivity different from that of the material layer 102, wherein, the material layer 102 is formed over a substrate 100, for example. The material of the material layer 102 can be, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material. If the material layer 102 serves as a gate after subsequent patterning processes, a gate dielectric layer 106 can further be formed between the material layer 102 and the substrate 100. In addition, the material of the mask material layer 104 can be, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material. The material of the mask material layer 10...

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Abstract

A method for fabricating a mask is provided. A patterned sacrificial layer is formed over a mask material layer, and the patterned sacrificial layer has an etch selectivity different from that of the mask material layer. An isotropic etch process is performed to the mask material layer by using the patterned sacrificial layer as an etch mask to form a mask layer, wherein the dimension of the mask layer is smaller than that of the patterned sacrificial layer.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor process, and more particularly to a method for fabricating a mask and a patterning process using the mask. [0003] 2. Description of the Related Art [0004] As the integration of circuits continues to increase, the dimensions of circuit devices must shrink to meet the requirement. One of the most important processes in the semiconductor technology is the photolithographic process. Patterns of different film layers and areas with dopants of Metal-Oxide-Semiconductor (MOS) devices are defined by the photolithographic process. In detail, dimensions of a photoresist layer formed by the photolithographic process or dimensions of a mask formed by using the patterned photoresist layer are closely related to the photolithographic process. Whether the device integration of the semiconductor technology can progress to smaller dimensions is depended upon the development of the pho...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C23F1/00
CPCH01L21/0337H01L21/0338
Inventor LIN, BENJAMIN SZU-MIN
Owner UNITED MICROELECTRONICS CORP