Plating method

US20090095634A1Inactive Publication Date: 2009-04-16EBARA CORP +1
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[0045]Preferred embodiments of the present invention will now be described in detail with reference to the drawings. The following embodiments relate to the application of the present invention useful for forming interconnects of copper by filling copper into interconnect recesses, such as contact holes 3 and trenches 4, formed in a insulating film 2 by plating onto a surface of a seed layer 7 as a conductive film having formed on the surface of the substrate W, as shown in FIGS. 1A and 1B.

[0046]FIG. 7 is an overall plan view of a substrate processing apparatus incorporating a plating apparatus for performing a plating method of the present invention. As shown in FIG. 7, this substrate processing apparatus has a facility which houses therein two loading / unloading units 10 for housing a plurality of substrates W therein, two plating apparatuses 12 for performing a plating process and processing incidental thereto, a transfer robot 14 for transferring substrates W between the loading / ...

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Abstract

A plating method can form a plated film having a uniform thickness over the entire surface, including the peripheral surface, of a substrate. The plating method includes: disposing an anode so as to face a conductive film, formed on a substrate, which serves as a cathode, and disposing an auxiliary cathode on an ring-shaped seal member for sealing a peripheral portion of the substrate; bringing the conductive film, the anode and the auxiliary cathode into contact with a plating solution; and supplying electric currents between the anode and the conductive film, and between the anode and the auxiliary cathode to carry out plating.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a plating method, and more particularly to a plating method used for filling interconnect recesses formed in a surface of a substrate, such as a semiconductor wafer, with an electrical conductor (interconnect material), such as copper or silver, so as to form interconnects.[0003]2. Description of the Related Art[0004]In recent years, instead of using aluminum or aluminum alloys as a metallic material for forming interconnect circuits on a semiconductor substrate; there is an eminent movement towards using copper (Cu) that has a low electric resistivity and high electromigration resistance. Copper interconnects are generally formed by filling copper into fine interconnect recesses formed in a surface of a substrate. Various techniques are known for forming such copper interconnects, including CVD, sputtering, and plating. According to any such technique, a copper film is formed in a subst...

Claims

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Application Information

Patent Timeline
16 Apr 2009
Publication
US20090095634A1
IPC
C25D5/48; C25D5/00
CPC
C25D17/00; C25D21/12; C25D17/008; H01L21/76877; H01L21/2885
Inventors
MAKINO, NATSUKI; NAMIKI, KEISUKE