System for semiconductor structure processing using multiple laser beam spots

Abstract

Methods and systems selectively irradiate structures on or within a semiconductor substrate using a plurality of pulsed laser beams. The structures are arranged in a row extending in a generally lengthwise direction. The method generates a first pulsed laser beam that propagates along a first laser beam axis that intersects the semiconductor substrate and a second pulsed laser beam that propagates along a second laser beam axis that intersects the semiconductor substrate. The method directs respective first and second pulses from the first and second pulsed laser beams onto distinct first and second structures in the row. The method moves the first and second laser beam axes relative to the semiconductor substrate substantially in unison in a direction substantially parallel to the lengthwise direction of the row.

Description

TECHNICAL FIELDThis disclosure relates generally to manufacturing semiconductor integrated circuits and more particularly to the use of laser beams to process structures on or within a semiconductor integrated circuit.BACKGROUNDDuring their fabrication process, ICs (integrated circuits) often incur defects for various reasons. For that reason, IC devices are usually designed to contain redundant circuit elements, such as spare rows and columns of memory cells in semiconductor memory devices, e.g., a DRAM (dynamic random access memory), an SRAM (static random access memory), or an embedded memory. Such devices are also designed to include particular laser-severable links between electrical contacts of the redundant circuit elements. Such links can be removed, for example, to disconnect a defective memory cell and to substitute a replacement redundant cell. Similar techniques are also used to sever links in order to program or configure logic products, such as gate arrays or ASICs (ap...

AI Technical Summary

Problems solved by technology

During their fabrication process, ICs (integrated circuits) often incur defects for various reasons.

In addition, link banks, and link runs may not be straight rows and may not be processed with continuous motion.

Improvements in these areas will continue; however, practical limitations associated with these parameters make this a difficult way to achieve large throughput gains.

Increasing stage acceleration introduces additional vibrations and generates heat, both of which can decrease system accuracy.

Significantly increasing the stage acceleration and bandwidth, without diminishing the positional accuracy or increasing the system footprint, is a challenging and costly engineering endeavor, and the benefits of that effort would only be moderate.

Increasing the laser PRF, and hence link run velocity, is also undesirable for a number of reasons.

First, there are unfavorable changes in the laser pulses that result from increasing the PRF.

This may decrease the processing efficiency on some link structures.

Higher laser PRFs are also associated with less energy stability, which also decreases processing efficiency.

High laser PRFs are also undesirable when applied to semiconductor products that have a large link pitch.

Processing at high stage velocities may also not be possible if these velocities exceed some system specification, such as the maximum stage or position feedback sensor velocity.

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