Signal delay apparatus for providing exact delay amount, memory apparatus utilizing the signal delay apparatus, and signal delay method

Abstract

A signal delay apparatus, including: a period digitalization circuit, for digitalizing a period of a reference clock signal to generate a digitalized reference period; a delay control signal generator, for generating a delay control signal according to the digitalized reference period, a reference frequency and a required delay indicating signal; and a delay circuit, for delaying an input signal to generate an output signal according to the required delay control signal.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a signal delay apparatus, a memory apparatus that utilizes this signal delay apparatus and a signal delay method, and more particularly, to a signal delay apparatus capable of providing an exact delay amount, a memory apparatus that utilizes this signal delay apparatus and a signal delay method thereof.[0003]2. Description of the Prior Art[0004]FIG. 1 shows a memory apparatus 100 according to the prior art. As shown in FIG. 1, the conventional memory apparatus 100 includes a memory module 101 and a control circuit 103. The control circuit 103 accesses (reads / writes) the memory chips 105-111 via signal channels 113-119. In earlier electronic apparatuses, four-layer circuit boards are utilized, so there is enough room between each signal channel line, power line and ground line. Therefore, there is no problem resulted from mismatch between signal channel lines. However, in order to decreas...

AI Technical Summary

Benefits of technology

[0007]Therefore, one of the objectives of the present invention is to provide a signal delay apparatus capable of providing an exact delay amount and capable of being controlled simply and a signal delay method thereof.

[0011]According to the aforementioned exemplary embodiments, the digitalization control circuit may provide an exact delay value, and may simultaneously utilize a plurality of delay circuits and a plurality of delay control signals to control respective delay circuits. Moreover, by utilizing this mechanism, the delay circuit may not be limited to be disposed close to the delay control circuit for decreasing interference between signal transmissions, thereby improving flexibility in circuit design and decreasing the circuit area.

Problems solved by technology

As a result, the signal channel lines, the power lines, the ground lines, etc. will be hard to place and route balanced, so there is a problem resulted from the mismatch between signal channel lines.

For example, it is difficult to control the analog signal.

When the compensation is realized by means of continuous try-and-error, it is time-consuming and requires a large circuit area.

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