Selective growth of a work-function metal in a replacement metal gate of a semiconductor device

Abstract

Approaches for forming a replacement metal gate (RMG) of a semiconductor device, are disclosed. Specifically provided is a p-channel field effect transistor (p-FET) and an n-channel field effect transistor (n-FET) formed over a substrate, the p-FET and the n-FET each having a recess formed therein, a high-k layer and a barrier layer formed within each recess, a work-function metal (WFM) selectively grown within the recess of the n-FET, wherein the high-k layer, barrier layer, and WFM are each recessed to a desired height within the recesses, and a metal material (e.g., Tungsten) formed within each recess. By providing a WFM chamfer earlier in the process, the risk of mask materials filling into each gate recess is reduced. Furthermore, the selective WFM growth improves fill-in of the metal material, which lowers gate resistance in the device.

Description

BACKGROUND[0001]1. Technical Field[0002]This invention relates generally to the field of semiconductors and, more particularly, to forming a replacement metal gate (RMG) of a semiconductor device.[0003]2. Related Art[0004]Metal-oxide-semiconductor (MOS) transistors using polysilicon gate electrodes are known. Polysilicon material is able to tolerate high temperature processing better than most metals, so that polysilicon can be annealed at high temperatures along with source and drain regions. In addition, polysilicon blocks ion implantation of doped atoms into a channel region, facilitating the formation of self-aligned source and drain structures after gate patterning is completed.[0005]The high resistivities of polysilicon materials, as compared to most metal materials, result in polysilicon gate electrodes that operate at much slower speeds than gates made of metallic materials. One way of compensating for the higher resistance of polysilicon materials is to perform extensive si...

AI Technical Summary

Benefits of technology

[0009]In general, approaches for forming a replacement metal gate (RMG) of a semiconductor device, are disclosed. Specifically, provided is a p-channel field effect transistor (p-FET) and an n-channel field effect transistor (n-FET) formed over a substrate, the p-FET and the n-FET each having a recess formed therein, a high-k layer, a barrier layer, and an optional metal layer formed within each recess, a work-function metal (WFM) selectively grown within the recess of the n-FET, and a metal material (e.g., Tungsten) formed within each recess. By performing a chamfer of the high-k layer, barrier layer, and the metal layer earlier in the process, the risk of mask materials filling into each gate recess is reduced. Furthermore, the selective WFM growth (e.g., of a single-element metal as opposed to a metal compound) improves fill-in of the metal material, which lowers gate resistance in the device.

[0010]One aspect of the present invention includes method for forming a replacement metal gate (RMG) of a semiconductor device, the method comprising: providing a set of field effect transistors (FET) formed over a substrate, each of the set of FETs having a recess formed therein; forming a high-k layer over the semiconductor device and within each recess; forming a barrier layer over the high-k layer; forming an organic dielectric layer (ODL) within each recess; recessing the ODL to a desired height within each recess; removing the high-k layer and the barrier layer from atop the semiconductor device selective to the ODL within each reces

Problems solved by technology

However, tight PC dimensions make metal chamfering challenging.

In another approach, shown in FIG. 2, a pinch-off of TiN 220 causes a seam/void 230 to form in recess 210, which results in a non-uniform or catastrophic metal recess.

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