Endecryptor preventing side channel attack, driving method thereof and control device having the same
a technology of endecryptor and side channel, applied in the field of endecryptor, can solve the problem that the method typically performs mathematically complicated operations, and achieve the effect of performing high-speed operations and small area
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first embodiment
[0226]FIG. 20 is a block diagram illustrating a memory system according to the inventive concept.
[0227]Referring to FIG. 20, a memory system 410 may include a nonvolatile memory device 412 and a memory controller 414.
[0228]The nonvolatile memory device 412 may include a NAND flash memory device, a NOR flash memory device, a resistive random access memory (RRAM), a phase-change random access memory (PRAM), a magnetroresistive random access memory (MRAM), a ferroelectric random access memory (FRAM), and a spin transfer torque random access memory (STT-RAM).
[0229]The memory controller 414 may control the nonvolatile memory device 412 according to a request of an external device (e.g., a host). For example, the memory controller 414 may be implemented to control read, write, and remove operations of the nonvolatile memory device 412.
[0230]The memory controller 414 may provide an interface between the nonvolatile memory device 412 and a host. The memory controller 414 may be implemented ...
second embodiment
[0238]FIG. 21 is a block diagram illustrating a memory system according to the inventive concept.
[0239]Referring to FIG. 21, the memory system 420 may include a nonvolatile memory device 422 and a memory controller 424.
[0240]The memory controller 424 according to some embodiments of the inventive concept may include a processor 424_1, an encryption and decryption processor 424_2, a buffer 424_3, an error correction code (ECC) 414_4, a ROM 424_5, a host interface 424_6, and a memory interface 424_7.
[0241]In some embodiments, the encryption and decryption processor 424_2 may include the endecryptor 100 shown in FIG. 7.
[0242]FIG. 22 is a block diagram with respect to a memory card according to some embodiments of the inventive concept.
[0243]Referring to FIG. 22, the memory card 430 may include a flash memory 432, a buffer memory 434, and a memory controller 436 for controlling the flash memory 432 and the buffer memory 434.
[0244]The flash memory 432 may be a NAND flash memory or a NOR ...
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