Memory system with improved efficiency of data transfer between host, buffer and nonvolatile memory

Abstract

The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application is a divisional of application Ser. No. 10 / 341,367 filed Jan. 14, 2003 now U.S. Pat. No. 6,744,692.BACKGROUND OF THE INVENTION[0002]The present invention relates to a technique of buffering access data in a memory system for performing access control between an external interface and a nonvolatile memory in response to an access request from the outside and, for example, to a technique effectively applied to a flash memory card.[0003]A flash memory card has a flash memory and a controller. Since the operation speed, particularly, writing or rewriting operation speed of the flash memory is lower than operation speed of a host connected to the flash memory card, the controller has a buffer memory in order to absorb the difference between the operation speeds. In response to a write request from the outside, the controller controls to input write data from the outside to the buffer memory and write the input data into the fla...

AI Technical Summary

Benefits of technology

[0021]As a desired mode of the invention, the buffer memory is a single-port clock-synchronous volatile memory and operates in an FIFO manner. Higher speed of the buffer memory and easier access control can be realized. The nonvolatile memory is, for example, a flash memory.

Problems solved by technology

Particularly, in the case where writing of data into the flash memory fails, for example, when the data has to be written again to a replacing sector due to a failure in a sector to which the writing operation is performed first, the next write data from the host cannot be received by the buffer memory.

Consequently, due to a problem between the flash memory and the controller, data transfer between the host and the controller has to be waited.

It increases burden on the host and processing time, and a problem such that the data processing efficiency deteriorates occurs.

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