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Semiconductor device and driving method thereof

a technology of semiconductor devices and driving methods, applied in information storage, static storage, digital storage, etc., can solve problems such as malfunctions in writing/reading data to/from nonvolatile memory, and achieve the effect of reducing the power consumption of semiconductor devices

Inactive Publication Date: 2015-09-08
SEMICON ENERGY LAB CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

Enables normal operation of nonvolatile memory while reducing power consumption by effectively managing state data and power supply in semiconductor devices, preventing data malfunctions associated with P-state changes.

Problems solved by technology

However, a change of driving voltage or frequency with a P-state function causes a malfunction in writing or reading data to / from the nonvolatile memory in some cases.

Method used

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  • Semiconductor device and driving method thereof
  • Semiconductor device and driving method thereof
  • Semiconductor device and driving method thereof

Examples

Experimental program
Comparison scheme
Effect test

embodiment 1

[0047]In this embodiment, a structure and a driving method of a semiconductor device of one embodiment of the present invention will be described.

[0048]As a measure to reduce power consumption of a processor, there is a method in which data in a volatile memory device such as a register or a cache memory included in the processor is stored in a nonvolatile memory device formed in the periphery of the volatile memory device, and supply of power supply voltage to a signal processing circuit including the register or the cache memory is temporarily stopped. Since supply of the power supply voltage to the signal processing circuit is stopped in a period during which data is not input or output, power consumption can be reduced without a significant degradation of the processing capacity of the processor.

[0049]In this specification, the term “nonvolatile” means a property of retaining stored data even when power supply is stopped, and the term “volatile” means a property of erasing store...

embodiment 2

[0106]In this embodiment, an example of a memory element including a nonvolatile memory, which can be used in the semiconductor device described in Embodiment 1, will be described.

[0107]FIG. 7 is an example of a circuit diagram of a memory element (register) including a nonvolatile memory. A memory element 700 includes a volatile memory circuit 701, a nonvolatile memory circuit 702, a switch 703, a switch 704, a logic element 706, a capacitor 707, and a selector circuit 720. The volatile memory circuit 701 holds data only in a period during which a power supply voltage is supplied. The nonvolatile memory circuit 702 includes a capacitor 708, a transistor 709, and a transistor 710.

[0108]Note that the memory element 700 may further include another circuit element such as a diode, a resistor, or an inductor, as needed.

[0109]The transistor 709 is a transistor in which a channel is formed in an oxide semiconductor layer. In FIG. 7, “OS” is written beside a transistor in order to indicate...

embodiment 3

[0137]In this embodiment, an example of a memory device that can be used for any of the nonvolatile memories described in Embodiments 1 and 2 and includes a transistor including an oxide semiconductor will be described with reference to drawings.

[0138]FIGS. 9A to 9C are each a cross-sectional view of an example of the nonvolatile memory circuit 702 in Embodiment 2.

[0139]The nonvolatile memory circuit 702 illustrated in FIG. 9A includes, in the lower portion, the transistor 710 in which a first semiconductor material (a substrate 3000) is used for a channel formation region, and includes, in the upper portion, the transistor 709 in which a second semiconductor material 3210 is used for a channel formation region and the capacitor 708. One electrode of the capacitor 708 is a layer that can be formed through the same steps as a gate electrode 3260 of the transistor 709, the other electrode thereof also functions as a source electrode or drain electrode 3240 of the transistor 709, and a...

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Abstract

A semiconductor device in which a nonvolatile memory can normally operate and power saving can be performed with a P-state function, and a driving method of the semiconductor device are provided. The semiconductor device includes: a first circuit configured to control a state including a driving voltage and a clock frequency of a processor core; a first memory circuit and a second memory circuit which store state data; a second circuit generating a power supply voltage and a third circuit generating a clock which are electrically connected to the first circuit; and the processor core electrically connected to the second circuit and the third circuit through a switch. The processor cores includes: a volatile memory; and a nonvolatile memory transmitting and receiving data to / from the first memory.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a semiconductor device and a driving method thereof.[0003]2. Description of the Related Art[0004]A semiconductor device such as a processor includes a signal processing circuit having a variety of structures. A signal processing circuit generally includes a variety of memory devices such as a register and a cache memory. A register has a function of temporarily holding data for carrying out arithmetic processing, holding a program execution state, or the like. In addition, a cache memory is located between an arithmetic circuit and a low-speed main memory in order to reduce access to the main memory and speed up the arithmetic processing.[0005]In a memory device such as a register or a cache memory, reading and writing of data needs to be performed at higher speed than in a main memory. Thus, in general, a flip-flop or the like is used as a register, and a static random access memory (SR...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G11C7/00G11C7/22G11C11/00
CPCG11C7/22G11C11/005
Inventor TAKAHASHI, YASUYUKIYONEDA, SEIICHI
Owner SEMICON ENERGY LAB CO LTD