Data processor and data processing system and method for accessing a dynamic type memory using an address multiplexing system

Abstract

A microprocessor has a register in which attributive data corresponding to a memory to be coupled to the microprocessor is written, and a control circuit which controls address signals to be supplied to the memory in accordance with the attributive data. The attributive data is composed of range data for discriminating ranges of address data supplied to an address bus, system data indicative of addressing systems of the memories corresponding to the respective address ranges, and bit number data indicative of numbers of address bits of the memories. Thus, in a case where the memory to be accessed is of an address multiplexing system as in a dynamic RAM, the address data of the address bus is divided into row address data and column address data, which are then supplied to the memory in time division.

Description

BACKGROUND OF THE INVENTIONThis invention relates to data processing technology, and more particularly to technology which is especially effective when applied to a microprocessor.A microcomputer system is constructed of a microprocessor, storage devices such as a ROM (read-only memory) and a RAM (random access memory), an input / output interface (I / O), etc. In this case;, the use of a dynamic RAM is better than the use of a static RAM because of the merit that the system can be arranged less expensively.Since, however, the dynamic RAM requires an address multiplexing system and requires a refresh operation, the control thereof is more troublesome than those of the ROM and the static RAM. Therefore, any of prior-art microprocessors has been constructed so as to be capable of direct access to the ROM and the static RAM. When arranging the system to use a dynamic RAM, it has been necessary to dispose complicated external circuits including circuits for forming RAS (row address strobe) ...

AI Technical Summary

Benefits of technology

A microprocessor comprises therein a refresh counter which generates a refresh address, a control signal forming circuit which forms control signals, such as RAS signal and CAS signal, required for accessing a dynamic RAM, and a register which designates either access to the dynamic RAM or access to a static RAM (or a ROM), an address outputting mode being alterable in accordance with the content of the register, whereby not only the static RAM but also the dynamic RAM can be accessed, and the latter can be refreshed without disposing any external circuit, to facilitate the design of a system and to reduce the packaging area of the system.

In addition, the above register comprises registers which designate the address ranges and capacities of the dynamic RAMs to be used, namely, the number of bits of address signals, thereby to provide a microprocessor of high versatility in which the capacities or number of the dynamic RAMs to be used can be changed freely to some extent.

Problems solved by technology

Since, however, the dynamic RAM requires an address multiplexing system and requires a refresh operation, the control thereof is more troublesome than those of the ROM and the static RAM.

In this manner, the use of the dynamic RAM for the prior-art microprocessor has led to the problems that the design of the system becomes difficult and that the packaging area of the system becomes large.

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