Unlock instant, AI-driven research and patent intelligence for your innovation.

Silicon chip process test method

A process test, silicon wafer technology, applied in semiconductor/solid-state device testing/measurement, electrical components, semiconductor/solid-state device manufacturing, etc., can solve problems such as high R&D costs, rising silicon wafer prices, and consumption

Active Publication Date: 2008-01-16
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

After entering the 300mm process, the price of silicon wafers has risen sharply. If the same R&D test content as before is carried out, only in terms of silicon wafer consumption, the R&D cost of the 300mm process will be 2 to 3 times that of the 200mm process. The absolute consumption of millions of silicon wafers also makes the research and development cost quite expensive
[0004] The traditional process test adopts a single-chip single-test method, that is, each time a process test is performed, it needs to consume a piece of

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Silicon chip process test method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0031] Etching rate comparison test with or without film:

[0032] Select the main engraving process conditions to etch polysilicon, the specific process is as follows: the upper RF power is 3000W, the lower RF power is 80W, the chamber pressure is 15mT, the total gas flow rate is 230sccm, of which Cl 2 30sccm, HBr 170sccm, or He / O 2 The mixed gas is 30 sccm, and the volume ratio of the two is 7:3. Firstly, 9 times of repeated tests were carried out with film-coated silicon wafers. The film-coated method is shown in Figure 1. In addition, a piece of silicon wafer without film-coated was used for comparison with the above process conditions. The test results are as follows:

[0033] silicon wafer

[0034] It can be seen that the repeatability of the etching rate of the same process in different areas is good, and it is very close to the situation without film, indicating that this method can be used to restore the etching rate test very well.

Embodiment 2

[0036] In order to explore the etching rates of silicon dioxide and polysilicon under different process conditions, the process conditions with an etch rate selectivity ratio of 1:1 can be found through experiments, and a through-step etch rate selectivity test is required. In the through etching step, the upper electrode power is 250W, 300W and 350W, the lower electrode power is 40W, 60W and 80W, the reaction chamber pressure is 5mT, 10mT and 15mT, C2F6 is 40sccm, 60sccm and 80sccm, and the process time is 2 minutes. The silicon dioxide etch rate test steps throughout the steps are as follows:

[0037] A. Use the orthogonal design method to design the number of experiments required: this experiment has 4 variables and 3 levels, and L can be used 9 3 4 A total of 9 tests are required for the test plan, and the process conditions of the 9 tests are shown in Table 1.

[0038] B. Paste 9 films evenly on a silicon dioxide wafer. The film pasting method is shown in Figure 1.

...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

This invention relates to a method for testing silicon chips including: designing the necessary test times based on the technology requirement, adhering related numbers of films uniformly distributed on the chip, unclosing a sheet of film for testing, unclosing a new film after a test is finished and moving the opened position to the last one to carry out the next time of test and the film is PI.

Description

technical field [0001] The invention relates to a silicon chip processing technology, in particular to a silicon chip processing technology test method. Background technique [0002] At present, 300mm silicon wafers are the mainstream in the semiconductor industry, and the domestic semiconductor industry is shifting from 200mm silicon wafers to 300mm silicon wafers. One generation of equipment and one generation of technology, equipment manufacturers are responsible for process research and development, which is a potential rule in the semiconductor industry. [0003] Process results are closely related to a series of factors such as coil design, reaction chamber pressure, temperature, gas flow rate, gas composition ratio, and process time. In order to obtain ideal etching results, a large amount of silicon wafers will be consumed in the process of process development. The traditional test method is to consume one piece per test, that is, a single test on a single chip. For...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/00H01L21/66
Inventor 唐果
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD