Method for finishing hard mask layer, method for forming transistor grids, and stack structure

Abstract

A method for trimming a hard mask layer provides a substrate, a hard mask layer, and a three-layer stack layer on the substrate. The three-layer stack includes a top photoresist, a silicon-containing layer, and a bottom photoresist. The top photoresist, the silicon-containing layer, the bottom photoresist and the hard mask layer are sequentially patterned, and then a trimming process is performed on the hard mask layer. Since the underlying photoresist of the present invention is thin and is worn out during etching, photoresist line collapse does not occur.

Description

technical field [0001] The invention relates to a method for trimming a hard mask layer, in particular to a method for improving the trimming of the hard mask layer by using three photoresist layers to form a gate of a metal oxide semiconductor transistor. Background technique [0002] As semiconductor manufacturing technology becomes more and more sophisticated, integrated circuits have undergone major changes, which has led to a rapid increase in computing performance and storage capacity of computers, and has driven the rapid development of peripheral industries. The semiconductor industry is also developing at the speed of doubling the number of transistors on integrated circuits every 18 months, as predicted by Moore's Law. 90 nanometers (nm) (0.09 microns), entering 65 nanometers (0.065 microns process) in 2005 and moving towards 45 nanometers. [0003] In the process of fabricating a metal oxide semiconductor transistor (MOS transistor), forming a conductive gate is ...

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Problems solved by technology

[0008] However, since the antireflection bottom layer 110 is etched by carbon tetrafluoride and trifluoromethane faster than the hard mask layer 108, this method often causes the hard mask layer 108 to be etched near the antireflection bottom layer 110. greater than the portion near the conductive layer 106, the hard mask layer 108 thus becomes a distorted pattern

Therefore, under the condition that the hard mask layer 108 has been deformed, it is used as an etching mask for etching the conductive layer 106 to form a gate, and the gate structure produced by it is not good.

More importantly, the anti-reflective bottom layer 110 is prone to photoresist line collapse (line collapse) during the trimming process and subsequent etching of the conductive layer, which will seriously damage the entire process flow and results.

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