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Corrosion of silicon nitride layer with single-chip substrate as back for IC integrated circuit

A silicon single wafer and integrated circuit technology is applied in the new corrosion field of the silicon nitride layer on the backside of the silicon single wafer substrate of the semiconductor integrated circuit, and can solve the problems of high manufacturing cost, waste products, and high price of the semiconductor integrated circuit.

Active Publication Date: 2009-09-09
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the silicon nitride (SiN) protective layer on the backside of the silicon single-wafer substrate must be removed. The reason is that the silicon nitride (SiN) protective layer on the backside of the silicon single-wafer substrate will cause very large stress, and the large stress will cause the The warping of the silicon single wafer substrate (wrap) causes the optical critical dimension of the semiconductor integrated circuit to change, thus causing waste products, reducing the product qualification rate, and causing the total manufacturing cost of the semiconductor integrated circuit to be high
[0005] In the existing manufacturing method of semiconductor memory, it is necessary to use special silicon nitride (SiN) layer etching equipment on the back side of the silicon single wafer substrate to remove the silicon nitride (SiN) layer on the back side of the silicon single wafer substrate. The silicon nitride (SiN) layer etching equipment on the back of the single wafer is expensive, thus, the total manufacturing cost of the semiconductor memory is high

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  • Corrosion of silicon nitride layer with single-chip substrate as back for IC integrated circuit
  • Corrosion of silicon nitride layer with single-chip substrate as back for IC integrated circuit
  • Corrosion of silicon nitride layer with single-chip substrate as back for IC integrated circuit

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Embodiment Construction

[0025] FIG. 1 is a schematic diagram of process steps of an existing silicon nitride (SiN) layer etching method on the back side of a silicon single wafer substrate.

[0026] Referring to Fig. 1, the existing silicon nitride (SiN) layer etching method on the back side of the silicon single wafer substrate comprises the following steps: deposit gate material on the silicon single wafer substrate; deposit the silicon single wafer with the gate material on it The substrate is placed in a low-pressure chemical vapor deposition (LPCVD) furnace, and a silicon nitride (SiN) protective layer is formed on the top surface and the back surface of the silicon single wafer substrate, and the silicon nitride (SiN) protective layer on the top surface As an etch-stop layer in a process performed subsequently; since the silicon nitride (SiN) layer formed on the back side of the silicon single-wafer substrate causes a large stress, this large stress causes the silicon single-wafer substrate to w...

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Abstract

The method includes following steps: (1) set up a silicon signal-crystal substrate; (2) stack oxide gating material;(3) stack polycrystalline silicon layer;(4) form SiN protective layer on the top surface and backside of silicon single-crystal substrate;(5) SiO2 layer is formed on SiN layer on surface of silicon single-crystal substrate;(6) H3PO4 is used to remove the SiN layer on the backside of silicon signal-crystal layer; (7) HF is used to remove SiO2 layer on SiN layer on the top surface of silicon single-crystal substrate, and the SiN layer on the top surface is kept.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a new etching method for a silicon nitride layer on the back side of a silicon single wafer substrate of a semiconductor integrated circuit. Background technique [0002] Existing, for example, the manufacturing method of the semiconductor integrated circuit of semiconductor memory comprises the following steps: [0003] (1) setting a silicon single wafer substrate; (2) depositing gate oxide on the silicon single wafer substrate; (3) depositing a polysilicon layer (polysilicon) layer on the gate oxide; (4) depositing a polysilicon layer Form silicon nitride (SiN) protection layer in the low-pressure chemical vapor deposition (LPCVD) furnace of the silicon single wafer substrate; (5) remove the silicon nitride (SiN) protection layer of silicon single wafer substrate backside; Then carry out Photolithography patterning, subsequent process steps such a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/3063H01L21/822
Inventor 季华陈国庆
Owner SEMICON MFG INT (SHANGHAI) CORP