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Method for manufacturing multilayer printed wiring board and multilayer printed wiring board obtained by the manufacturing method

A technology of multi-layer printing and manufacturing method, which is applied in the manufacture of multi-layer printed wiring boards and the field of multi-layer printed wiring boards, which can solve the problems of increased dielectric loss and achieve high quality and ease constraints.

Inactive Publication Date: 2007-07-18
MITSUI MINING & SMELTING CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the high dielectric rate, the dielectric layer has the problem of increased dielectric loss when transmitting signal signals, etc.
In addition, compared to this dielectric layer, it is often impossible to embed other circuit elements such as inductors, and there are usually certain restrictions on circuit design.

Method used

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  • Method for manufacturing multilayer printed wiring board and multilayer printed wiring board obtained by the manufacturing method
  • Method for manufacturing multilayer printed wiring board and multilayer printed wiring board obtained by the manufacturing method
  • Method for manufacturing multilayer printed wiring board and multilayer printed wiring board obtained by the manufacturing method

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Experimental program
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Effect test

Embodiment approach

[0047] The description will be divided into "a method of manufacturing a multilayer printed wiring board provided with a built-in capacitor circuit" and "a multilayer printed wiring board provided with a built-in capacitor circuit".

[0048]

[0049] A method of manufacturing a multilayer printed wiring board provided with a built-in capacitor circuit (hereinafter referred to simply as "multilayer printed wiring board") according to the present invention will be described mainly using FIGS. In addition, in the present invention, although the drawings are often used for description, the pores and the like for ensuring electrical conduction between the capacitor portion and the interlayer circuit in the drawings can be formed in any shape at any time by a usual method. Therefore, the description of these interlayer conducting methods will be omitted, and the stacking sequence and the removal sequence of the dielectric layer will be mainly described so that the technical idea of...

Embodiment 1

[0099] (manufacturing of core material)

[0100] According to the usual method, 18 μm thick electrolytic copper foils were pasted on both surfaces of a 50 μm thick FR-4 preform to obtain a copper-clad laminate on both surfaces. Then, the copper foils on both surfaces of this copper-clad laminate on both surfaces were subjected to surface conditioning and pickling cleaning, followed by drying. A dry film was pasted on the copper foil surfaces of both surfaces, and an etching pattern was exposed and developed. Then, etching is performed with a copper etchant to form a base electrode circuit including the shape of the base electrode, the protective film is peeled off with an alkaline solution, washed with water, and dried to form a core material.

[0101] (Manufacture of metal foil with resin layer containing dielectric filler)

[0102] First, a resin solution is prepared. When making this resin solution, use 25 parts by weight of phenol novolac type epoxy resin, 25 parts by wei...

Embodiment 2

[0125] In this embodiment 2, process A, process D, and process E are the same as embodiment 1, and the difference is process B and process C. Therefore, the description of the steps A, D, and E which are overlapping explanations is omitted, and only the steps B and C will be described.

[0126] (Process B)

[0127] In this upper electrode forming step, the above-mentioned first conductive metal layer 6 located in the outer layer is processed into the upper electrode 7 of the capacitor, and the dielectric layer in the region other than the circuit portion is exposed. Therefore, on the surface of the first conductive metal layer 6, a dry film as a resist film is laminated to form a resist film layer, and the protective film pattern is exposed and developed on the resist film layer, and the first layer is dissolved and removed by using an etching solution. After the upper electrode 7 is formed on the unnecessary portion of the conductive metal layer 6 as shown in FIG. 7(I), a re...

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Abstract

A manufacturing technology of a multilayer printed wiring board which has excellent film thickness uniformity of a dielectric layer and excellent positional accuracy of a capacitor circuit and in which unnecessary dielectric layer is removed as much as possible, and a multilayer printed wiring board provided with a built-in capacitor circuit are provided. The multilayer printed wiring board provided with the built-in capacitor circuit is manufactured through a first conductivity type metal layer laminating process wherein a dielectric layer and a first conductivity type metal layer are provided on both planes of a core material provided with a base electrode circuit; an upper electrode forming process wherein the first conductivity type metal layer positioned on an outer layer is processed into an upper electrode and the dielectric layer in a region other than a circuit part is exposed; a dielectric layer removing process wherein the exposed dielectric layer other than that on the circuit part is removed; a second conductivity type metal layer laminating process wherein a gap between the upper electrodes is buried and an insulating layer and a second conductivity type metal layer are provided on the upper electrode; and an outer layer circuit forming process wherein the second conductivity type metal layer is processed into an outer layer circuit.

Description

technical field [0001] The invention according to this application relates to a method for manufacturing a multilayer printed wiring board and a multilayer printed wiring board obtained by using the method. In particular, it provides a manufacturing method suitable for a multilayer printed wiring board incorporating a capacitor circuit. Background technique [0002] Conventionally, multilayer printed wiring boards incorporating capacitor circuits have used one or more insulating layers provided on their inner layers as dielectric layers, and the inner layers provided on both surfaces of the dielectric layer On the layer circuit, the upper electrode and the base electrode of the capacitor are used in an opposing form. Therefore, this capacitor circuit is also called a built-in capacitor circuit. [0003] The multilayer printed wiring board provided with this built-in capacitor uses a general printed wiring board manufacturing process, and the manufacturing method shown in F...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K3/46
CPCH05K3/4626H05K2203/025H05K3/0044H05K3/4652H05K2201/0195H05K2201/09509Y10T29/435H05K2201/0376H05K1/162H05K3/4655H05K2203/0554Y10T29/49165H05K2201/0209H05K3/002Y10T29/49155Y10T29/4913H05K3/46
Inventor 中村健介
Owner MITSUI MINING & SMELTING CO LTD
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