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Silicon-base plane side grid single electronic transistor and manufacturing method thereof

A single-electron transistor and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of complex manufacturing process, low manufacturing efficiency and high manufacturing cost, and achieve simplified manufacturing process, reduced manufacturing cost, The effect of improving reliability

Inactive Publication Date: 2007-12-19
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The single-electron transistors fabricated by using the above-mentioned Coulomb island structure can generally obtain higher operating temperatures, but the fabrication of single-electron transistors by using the above-mentioned Coulomb island structure generally has complex manufacturing processes, high manufacturing costs, low manufacturing efficiency, and poor feasibility. And the shortcomings of poor compatibility with traditional CMOS processes

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  • Silicon-base plane side grid single electronic transistor and manufacturing method thereof
  • Silicon-base plane side grid single electronic transistor and manufacturing method thereof
  • Silicon-base plane side grid single electronic transistor and manufacturing method thereof

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Embodiment 1

[0108] This embodiment adopts p-type, (111) crystalline SOI substrate, SAL601 chemically amplified negative electronic resist, SiO 2 Dielectric, AZ5214 optical inversion resist, ICP etching method, the SOI substrate is composed of silicon base 1, 375nm-thick buried oxide layer 2 and 120nm-thick top layer silicon 3 from bottom to top. The accompanying drawings further illustrate the detailed process and steps of the present invention.

[0109] As shown in FIG. 15 , FIG. 15 is a schematic diagram of performing ion implantation and rapid annealing on top silicon of an SOI substrate according to an embodiment of the present invention.

[0110] In this embodiment, P 31+ ions, the implantation energy is 20keV, and the implantation dose is 1×10 15 cm -2 , then at N 2 atmosphere, rapid annealing at 1200°C for 15 seconds.

[0111] As shown in FIG. 16 , FIG. 16 is a schematic diagram of coating an electronic resist on top silicon of an SOI substrate according to an embodiment of th...

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Abstract

This invention discloses a side grid single electronic transistor with a silicon plane including: a coulomb island, a source and drain at both sides of the island, two tunnel joints connecting the island and the source and the drain, two side grids at both sides of the island and vertical to the direction of the source and the drain, a source electrode depositing on the source and a drain electrode depositing on the drain and a grid eelctrode depositing on the side grid. This invention also discloses a preparation method for the transistors, which greatly increases reliability of single electronic transistors and compatibility of the traditional CMOS technology.

Description

technical field [0001] The invention relates to the technical field of nanoelectronic devices and nanoprocessing, in particular to a silicon-based plane side-gate single-electron transistor and a manufacturing method thereof. Background technique [0002] Integrated circuits with complementary metal-oxide-semiconductor (CMOS) devices as the mainstream technology have been developing rapidly following Moore's Law. In 2004, integrated circuits entered the 90nm technology node. As the feature size enters the nanoscale, the traditional CMOS technology is facing more and more serious challenges. Therefore, nanoelectronic devices based on new principles have become a research hotspot. [0003] Single-electron transistors have the advantages of small size, fast speed, low power consumption, and large-scale integration, and have very broad application prospects, such as making single-electron memories, single-electron logic circuits, current standards, resistance standards, and temp...

Claims

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Application Information

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IPC IPC(8): H01L29/772H01L21/335
Inventor 龙世兵陈杰智李志刚刘明陈宝钦
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI