Phase change memory with diode unit selective connection and its making method
A phase-change storage and diode technology, which is applied in the field of microelectronics, can solve the problems of inability to realize multi-layer stacking of energy storage units, complex formation process of diode gating tube units, etc., and achieve the effect of increasing storage density
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Embodiment approach 1
[0060] 2a and 2b are schematic diagrams of array cells based on a phase-change memory using diode gating, and the array is denoted by reference numeral 200 . As shown in FIG. 2 , it includes four bit lines 1 and four word lines 6 , and the word lines 6 and bit lines 1 are connected by phase change material resistance units 8 and diode units 7 . In FIG. 2a, the word line 6 is directly connected to the phase change material unit 8, and the bit line 1 is directly connected to the diode unit 7; in FIG. 2b, the bit line 6 is directly connected to the phase change material unit 8, and the word line 1 is directly connected to the diode unit 7. The peripheral reading and writing circuit modules of the storage array are omitted here.
[0061] FIG. 3 is a plan view of the array 200 shown in FIG. 1 . The phase-change material unit 8 and the diode unit 7 are formed at the intersection of the word line 6 and the bit line 1 . The sizes of the phase-change material unit 8 and the diode unit...
Embodiment approach 2
[0082] The following is a phase-change memory based on a Schottky diode formed by a metal electrode and a manufacturing method thereof. Two different examples are specifically disclosed, the main difference being whether the gate diode is formed between the word line and the phase change film material or between the bit line and the phase change film material.
[0083] Figures 14a and 14b are schematic diagrams of the memory structure of different cross-sections of one example (the diode shown in Figure 2b is directly connected to the word line), and Figure 14a and Figure 14b are another example (the diode shown in Figure 2a is directly connected to the bit line). Schematic diagram of the cross-sectional memory structure. Figures 14a and 15a are I-I cross-sectional views of Figure 3 in the embodiment of the present disclosure, and Figures 14b and 15b are II-II cross-sectional views of Figure 3 in the embodiment of the present disclosure.
[0084] One of the examples is shown ...
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