Thin-film flip-chip packaging construction and multilayer circuit rewinding structure

Abstract

The present invention relates to a Chip-On-Film package and its multi-layer circuit winding structure. The multi-layer circuit winding structure mainly includes a first dielectric layer, even numbers of first-layer pins formed on a first dielectric layer, a second dielectric layer covering the first-layer pins, even numbers of second-layer pins formed on a second dielectric layer, and a welding-shielded layer covering the second-layer pins. The first-layer and the second-layer pins separately have even numbers of corresponding first and second protruded joints which are formed in joint region of wafer, and are exposed outside the welding-shielded layer, thus analyzing degree and performance of Chip-On-Film-package production can be improved. The joints of the first and the second protrusions are all strips and have height protruding from the welding-shielded layer, which can reduce cost of the welding-shielded layer.

Description

technical field [0001] The invention relates to a Chip-On-Film packaging technology, in particular to a Chip-On-Film packaging structure and its multi-layer circuit tape structure. Background technique [0002] Chip-On-Film (COF packaging) is a new-generation technology that can replace Tape Carrier Package (TCP). Except for the advancement of chip bonding technology, the rest of the process is roughly the same and also Circuit reels suitable for film-on-chip packaging can be moved in a reel-to-reel manner. Chips with chip-on-film packaging are usually required to have a smaller size and a larger number of bumps (ie, output / input electrode terminals). The pins are all arranged on the same layer, so the design space of the pins in the reel is limited, and the pin pitch cannot be reduced without limit due to the precision of the machine, so the size of the chip can only be increased or changed. Package lower resolution display driver chips. [0003] Please refer to FIG. 1 ,...

AI Technical Summary

Problems solved by technology

In addition, Taiwan Patent Publication No. 483076 "Manufacturing Method of Flexible Circuit Board with Multi-layer Structure" discloses a multi-layer flexible circuit board that can be used for flip-chip bonding. The metal wiring of different layers is embedded metal The protrusions are electrically connected to each other, and the exposed metal film on the surface for chip bump bonding is still lower than the solder mask layer on the outermost surface. The complicated wiring leads to a very high cost of the overall multilayer flexible circuit board, and for the bump Blocks are also poorly bonded

Furthermore, China Taiwan's new patent No. M269571 "Multi-chip thin film packaging structure and its flexible multilayer circuit board" discloses a multilayer flexible circuit board. The two circuit layers on the upper and lower surfaces of a dielectric layer can be respectively Flip-chip bonding and wire bonding for multiple chips cannot be integrated as a single chip flip-chip bonding, and it is still impossible to bond chips with matrix-arranged or more than two rows of bumps

[0006] It can be seen that the above-mentioned existing film-on-chip packaging circuit tape structure obviously still has inconvenience and defects in structure and use, and needs to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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