Bistable programmable resistance type random access memory
A resistive random, storage layer technology, applied in static memory, digital memory information, information storage, etc.
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[0108] A description of embodiments and methods of the present invention is now provided, and please refer to the diagrams shown in FIGS. 1-17 in conjunction. It should be understood that the disclosed specific embodiments are not intended to limit the present invention, but the present invention can be implemented using other features, elements, methods and embodiments. The same elements generally have the same reference numerals in different embodiments.
[0109] Figure 1 shows an illustration of a memory array 100, the manner in which it is implemented will be described here. As shown in FIG. 1 , a common source line 128 , a word line 123 and a word line 124 are arranged substantially parallel to each other in the Y direction. The bit line 141 and the bit line 142 are substantially parallel to each other and arranged in the X direction. Therefore, a Y-decoder and a word line driver located in a block 145 are coupled to the word lines 123 and 124 . An X-decoder and a set of...
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