Mask read-only memory and its manufacturing method

Abstract

The invention provides a MROM and a method for manufacturing the same, wherein the MROM comprises a plurality of bit lines and word lines, and also has a plurality of word lines covering between every two bit lines and a coding region of adjacent local regions of two bit lines. The prior art adopts the buried layer source electrode and drain electrode of a transistor as the bit line of a MROM; however, the MROM can not scale down and the reading-out speed of the MROM slows down when minimum feature size contracts continuously. The MROM provided by the invention is made inside the conductive well which is arranged on a silicon substrate and is provided with a shallow ditch groove arranged according to the bit lines, wherein a diffusion barrier layer is deposited on the wall of the shallow ditch groove; the bit lines, which are arranged inside the shallow ditch groove, are separated from the word lines through the isolation oxidation layer arranged inside the shallow ditch groove; moreover, the bit lines comprises an upper layer of heavy doping multicrystal silicon and a lower layer of heavy doping multicrystal silicon which are stacked; the conductive well is in direct contact with the isolation oxidation layer of a coding region and the upper layer of heavy doping multicrystal silicon; moreover, the contact area of the conductive well with the upper layer of heavy doping multicrystal silicon is provided with a source heavy doping region and a drain heavy doping region. The invention is convenient for scalingdown of the MROM and can increase reading-out speed.

Description

technical field [0001] The invention relates to memory technology, in particular to a mask read-only memory and a manufacturing method thereof. Background technique [0002] Mask Read Only Memory (MROM for short) is one of the common types of non-volatile (No-Volatile) memory, which is widely used in electronic products. Referring to FIG. 1 and FIG. 2 , they are respectively a top view and a cross-sectional view of a mask ROM commonly used in the industry at present. As shown in the figure, the mask ROM is fabricated in a conductive well 12 of a silicon substrate 11, which includes respectively A plurality of bit lines 13 and word lines 15 arranged in parallel, the plurality of word lines 15 are vertically arranged on the plurality of bit lines 13, and the plurality of bit lines 13 and word lines 15 are separated by a gate oxide layer 14 Open, the mask read-only memory also has a plurality of coding regions 16, the coding regions 16 are located in the conductive well 12 and...

AI Technical Summary

Problems solved by technology

[0006] The object of the present invention is to provide a mask read-only memory and its manufacturing method, which can overcome the problems of difficulty in proportional reduction and decrease in readout speed encountered by mask read-only memory when the minimum feature size is continuously reduced

Images