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Overlapping structure for semiconductor encapsulation body and its making method

A stacking structure and package technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as poor material connection, poor connection, warping, etc., to improve product reliability, The effect of reducing the stacking height and simplifying the manufacturing process

Active Publication Date: 2010-06-16
APTOS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the conductive terminals 32 on the PCB spacer 30 must be arranged one-to-one with the terminals 12, 22 on the carrier boards of the packages 10, 20, in addition to accurate alignment, poor connection between materials is also a problem
In addition, during the heating process, due to the different thermal expansion coefficients between different materials, warpage (warpage) phenomenon can be caused, and poor connection is more likely to cause popcorn (popcorn) phenomenon

Method used

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  • Overlapping structure for semiconductor encapsulation body and its making method
  • Overlapping structure for semiconductor encapsulation body and its making method
  • Overlapping structure for semiconductor encapsulation body and its making method

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Embodiment Construction

[0031] Its detailed description is as follows, and the preferred embodiments are only for illustration, and are not intended to limit the present invention.

[0032] First, please refer to Figure 2A , Figure 2B and Figure 2C , Figure 2A , Figure 2B and Figure 2C Each is a structural cross-sectional view of a manufacturing method of a semiconductor package structure according to an embodiment of the present invention. Please refer to Figure 2A , provide a package body 100, which has a carrier board 102, wherein a plurality of conductive terminals 104 are arranged on the upper surface and the lower surface of the carrier board 102, in this embodiment, the conductive terminals 104 are distributed on opposite sides of the carrier board 102 , but it can be understood that the distribution of the conductive terminals 104 depends on the design of the carrier board 102 and is not limited to what is shown in the figure. In one embodiment, the package 100 further includes ...

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Abstract

A semiconductor package stacking structure and manufacturing method thereof, comprising: electrically connecting each of the packages via mutually stacking the connecting assembly such as connector. Each of the packages can be stacked via meshing the convex part of the connecting assembly with corresponding concave part thereof, in order to reduce the stacking height effectively; furthermore, by replacing the traditional welding means with the stackable connecting assembly, the package can be conveniently inserted or pulled out; the problem of package carrying board warping can be eliminated,in order to improve quality reliability.

Description

technical field [0001] The invention relates to a semiconductor package stacking structure and its manufacturing method, in particular to a semiconductor packaging stacking structure using a connector as an electrical connection structure and its manufacturing method. Background technique [0002] With the rapid improvement of the functions of products such as computers and network communications, semiconductor technology must have the requirements of diversification, portability, and miniaturization, so that the chip packaging industry must move towards high-precision products such as high power, high density, lightness, thinness, and miniaturization. In addition, electronic packaging (Electronics Packaging) still needs to have the characteristics of high reliability and good heat dissipation, so as to transmit signals and power, and provide good heat dissipation channels and structural protection and support. [0003] Currently, there are roughly two methods of three-dimen...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L23/488H01L21/60
Inventor 卓恩民
Owner APTOS TECH