Manufacturing method of semiconductor device

Abstract

A manufacture method for a semiconductor apparatus includes the following steps of: providing a semiconductor underlay which consists of a core apparatus area and an I / O area and is formed with a griddielectric layer and a grid arranged on the grid dielectric layer; carrying out a first ion injection in the semiconductor underlay of the core apparatus area by taking the grid as a mask; carrying out spike annealing and forming a low doping source drain area in the core apparatus area; carrying out a secondary ion injection in the semiconductor underlay of the I / O area by taking the grid as themask; carrying out fast thermal annealing and forming a low doping source drain area in the I / O area; forming a clearance wall on the grid dielectric layer of the core apparatus area and the I / O areaaswell as the side wall of the grid; carrying out a third ion injection in the semiconductor underlay of the core apparatus area and the I / O area by taking the grid and the clearance wall as the masksto form a heavy doping source drain area. The method can adjust the saturation current of an apparatus and improve the reliability of input / output apparatuses.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a manufacturing method of a semiconductor device. Background technique [0002] With the rapid development of semiconductor manufacturing technology, in order to achieve faster computing speed, greater data storage capacity and more functions, semiconductor chips are developing towards higher device density and high integration. Most of the peripheral circuits of semiconductor chips need to use high-voltage input / output devices, while core devices such as various memory devices need to operate at low voltages. In order to maximize device performance, the channel length of the core devices has become shorter, resulting in short Channel region and short channel effect. In order to avoid the short channel effect, a lightly doped source / drain (LDD) structure is usually adopted. [0003] As the channel length of the core device shrinks, in order to obtain the required drive ...

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Problems solved by technology

[0009] However, the manufacturing method of the above-mentioned semiconductor device has the following disadvantages: 1) there is only one low-doped source-drain region ion implantation, which is difficult to suppress the short channel effect that occurs after the device is continuously reduced; 2) the low-doped source-drain of the input / output device After ion implantation in the region, there is no annealing to fully activate and diffuse impurities, which can cause the low-doped source region at the drain to form a high-intensity electric field under the gate dielectric layer, resulting in hot carrier effects, resulting in serious degradation of the life of the input / output device

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