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Method for making shallow gully insulation of dynamic random access memory

A technology of dynamic random access and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as lack of universality, achieve maximum electrical isolation capability, reduce leakage current level, and maximize Effect of leakage current suppression capability

Inactive Publication Date: 2008-12-17
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the above methods are highly targeted and not universal

Method used

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  • Method for making shallow gully insulation of dynamic random access memory
  • Method for making shallow gully insulation of dynamic random access memory
  • Method for making shallow gully insulation of dynamic random access memory

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Embodiment Construction

[0040] The present invention will be described in more detail below through embodiments with reference to the accompanying drawings.

[0041] According to the conventional process, the pad silicon oxide layers 90-110 are first formed on the silicon substrate 21 sequentially by means of atmospheric pressure thermal oxidation. Pad silicon nitride layer 700-900 is formed by means of low pressure chemical vapor deposition Then use the active area mask to transfer the pattern of the active area to the photoresist, and then use the photoresist as a mask to etch the pad silicon nitride, the pad silicon oxide layer, and the silicon liner by dry etching. At the bottom, the active area pattern is transferred to the pad silicon nitride layer and the pad silicon oxide layer, and the photoresist is removed.

[0042] The trench 22 formed by dry etching has a depth of 2200-2800 Preferably 2500 The inner bevel angle 26 of the groove is 85-90° (that is, the bevel angle formed by the sid...

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Abstract

A manufacturing method of a shallow trench isolation (STI) used for a dynamic random access memory comprises the steps of forming an active region and a trench with an oblique angle of over 85 DEG on a silicon substrate; forming a first silicon oxide thin substrate inside the trench; forming a silicon nitride thin substrate on the first silicon oxide thin substrate; forming a second silicon oxide thin substrate on the silicon nitride layer; high-temperature annealing; and depositing high-density plasma silicon oxide. The inventive method can reduce the electrical leakage quantity of the dynamic random access memory based on the original basic process, so as to improve the retention time.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor device, in particular to a manufacturing method of shallow trench isolation of a dynamic random access memory (DRAM) with low electric leakage. Background technique [0002] How to effectively reduce device leakage current to meet applications in different fields has always been a major challenge faced by the development of high-end CMOS processes. For dynamic random access memory, its specific working principle determines that the leakage current of the device is crucial to the time of data storage, thus playing a decisive role in the quality of the final product. [0003] As the line width of semiconductor devices shrinks to meet the development trend of faster speed and higher integration, some leakage currents that were previously negligible began to affect or even dominate the leakage performance of the entire device, making the line width of the leakage level under the same proces...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/8242
Inventor 周维
Owner SEMICON MFG INT (SHANGHAI) CORP