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Grid and method for manufacturing grid material

A technology of gate material and manufacturing method, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of serious dark current and noise, increase in charge accumulation, and reduce component efficiency, and reduce noise and dark current. , the effect of improving performance

Inactive Publication Date: 2008-12-17
UNITED MICROELECTRONICS CORP
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  • Abstract
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Problems solved by technology

However, due to the implantation of impurities, the crystal grains of the polysilicon will be recrystallized by the thermal process to form a polysilicon material with an enlarged grain size, which will change the original physical properties of the polysilicon gate and increase the accumulation of charges. The problem of dark current and noise is more serious, resulting in the reduction of device performance

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  • Grid and method for manufacturing grid material
  • Grid and method for manufacturing grid material
  • Grid and method for manufacturing grid material

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Embodiment Construction

[0044] figure 1 It is a cross-sectional view showing the structure of a metal-oxide-semiconductor transistor according to an embodiment of the present invention.

[0045] Please refer to figure 1 In this embodiment, a metal-oxide-semiconductor transistor is taken as an example for illustration, but the gate proposed by the present invention is not limited to be used in a metal-oxide-semiconductor transistor. figure 1 The metal oxide semiconductor transistor 105 is disposed on the substrate 100 and includes a gate dielectric layer 110 , a gate 120 and a doped region 135 .

[0046] The gate dielectric layer 110 is disposed on the substrate 100 , and its material is, for example, a dielectric material such as silicon oxide. The gate 120 is disposed on the gate dielectric layer 110 , and the gate 120 includes a conductor buffer layer 125 disposed on the gate dielectric layer 110 and a conductor layer 127 disposed on the conductor buffer layer 125 . The material of the conductor...

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Abstract

The invention provides a grid electrode and a manufacturing method of the grid electrode material. The grid electrode comprises a conductor buffer layer and a conductor layer. The conductor buffer layer, with a mean grain size approximately less than 100 nanometers, is arranged on a grid electrode dielectric layer. The conductor layer, with a mean grain size approximately greater than or equal to 100 nanometers, is arranged on the conductor buffer layer. The arrangement of the conductor buffer layer can reduce the influence of noise and dark current on the efficiency of elements.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a manufacturing method of a gate and gate material. Background technique [0002] Metal-oxide-semiconductor transistors are semiconductor elements that have been widely used in recent years, whether they are general logic elements, memory elements or image sensors, they can be seen everywhere. [0003] For example, the CMOS image sensor using the CMOS transistor, because of its high stability, high sensitivity, low operating voltage, low power consumption, high impedance and strong magnetism Therefore, it is widely used in handheld color cameras, black and white cameras for anti-theft surveillance, digital cameras, fax machines, and medical sensors, etc., among these image processing devices. [0004] However, such complementary metal-oxide-semiconductor transistors are prone to relatively large dark current and other noises. This makes it impo...

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Application Information

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IPC IPC(8): H01L29/43H01L29/49H01L21/283H01L21/285
Inventor 施俊吉
Owner UNITED MICROELECTRONICS CORP
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