Method for polishing copper by chemical and mechanical methods

A chemical-mechanical and main grinding technology, used in grinding equipment, grinding machine tools, electrical components, etc., can solve problems such as prolonged copper corrosion, affecting the electrical performance and stability of semiconductor devices, and copper interconnection defects, and achieve good corrosion inhibition. effect of action

Inactive Publication Date: 2009-01-28
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0010] In particular, the three steps described in the prior art are often carried out on different grinding pads of the same grinding equipment, and a certain step of grinding is carried out on each grinding pad. To complete the chemical mechanical grinding of copper, the substrate must be sequentially passed through different grinding pads. Grinding pad; the grinding time of each step may be different. Therefore, after the substrate on the grinding pad with a shorter grinding time completes the grinding of this stage, it is necessary to wait for the grinding of the base on the grinding pad of the next step to complete the grinding before entering the next step. The grinding pad of the step; this prolongs the corrosion of copper by deionized water and chemical substances in deionized water, causing defects in the formed copper interconnection lines, affecting the electrical properties and stability of the formed semiconductor devices

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  • Method for polishing copper by chemical and mechanical methods
  • Method for polishing copper by chemical and mechanical methods
  • Method for polishing copper by chemical and mechanical methods

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Embodiment Construction

[0055] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0056] Figure 5 It is the flowchart of the method embodiment of copper chemical mechanical polishing of the present invention, Figure 6 is a schematic cross-sectional view of a semiconductor substrate with a copper metal layer, Figure 7 to Figure 9 It is a schematic cross-sectional view of the semiconductor substrate structure corresponding to each step of the embodiment of the copper chemical mechanical polishing method of the present invention.

[0057] Such as Figure 6As shown, a semiconductor substrate 10 to be ground is provided, with a copper metal layer 16 on the semiconductor substrate 10, with an opening 12 in the semiconductor substrate 10, the copper metal layer fills the opening 12, and in the There is a barrier layer 14 between the copper metal layer 12 and the semiconductor substrate 10 .

[0058] Wherein, the copper ...

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Abstract

The invention discloses a chemical mechanical planarization method for copper, which is used for flattening the copper metal layer of semiconductor basements, and includes the following steps: executing first-stage grinding to remove the copper metal layer of semiconductor basements, executing second-stage grinding to remove the barrier layer under the copper metal layer; wherein, the second-stage grinding including the following steps: using grinding agent to carry out main grinding, using corrosion inhibitor to carry out grinding after finishing main grinding, and using deionized water to grinding and washing. The method can reduce or eliminate the corrosion on copper during the process of grinding.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a copper chemical mechanical polishing method. Background technique [0002] With the advancement of semiconductor integrated circuit manufacturing technology, the line width is getting smaller and smaller. In order to reduce the resistance-capacitance delay (RC delay) of the back-end interconnection structure, a dielectric material with a low dielectric constant is used as the dielectric layer, and copper Metal as the material for the interconnection lines; [0003] Because copper metal is difficult to etch, the industry introduces a damascene process or a dual damascene process to manufacture copper interconnection lines; in the manufacturing method of copper interconnection lines, a dielectric layer with a low dielectric constant is first formed; then, an opening is formed in the dielectric layer ; Then, metal copper is deposited in the opening and on the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B24B37/04H01L21/304
Inventor 贾丽丽李福洪
Owner SEMICON MFG INT (SHANGHAI) CORP
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