Fabrication method for high-voltage BCD device
A high-voltage, device technology, applied in the field of semiconductor manufacturing, can solve the problems of inconvenient circuit design and inability to make resistors, and achieve the effects of low cost, good compatibility and good portability
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Embodiment approach 1
[0069] A method for preparing high-voltage BCD devices, such as figure 1 As shown, the following process steps are included:
[0070] Step 1: Growth epitaxy. Using a P-type silicon substrate, using As lithography in the Bipolar region and the well resistance region for photolithography, arsenic implantation, and high-temperature push junction to form an NBL buried layer, and finally a P-type epitaxy is grown.
[0071] Step 2: Prepare Nwell. In the high-voltage DMOS area, the sampling device area, the PMOS area, the Bipolar area, the N well capacitor area, and the well resistor area, Nwell lithography is used for photolithography, and phosphorus is implanted to form Nwell.
[0072] Step 3: Prepare Pwell. In the NMOS area and the P-well capacitor area, a Pwell lithography is used for photolithography, and boron is implanted to form a Pwell.
[0073] Step 4: Prepare Deep-N + . Deep-N+ lithography plate is used for lithography in the Bipolar collector area, Deep-N + Phosphorus implan...
Embodiment approach 2
[0093] Part of the steps of the invention can be used to manufacture high-voltage DMOS devices and high-voltage sampling devices. Only 11 lithography plates are needed to make high-voltage devices. In order of plate number, they are: Nwell lithography plate, Pbase lithography plate, Pbody lithography plate, Pwell2 lithography plate, Active lithography plate, Poly lithography plate, NSD lithography, PSD lithography, Omicont lithography, Metal lithography, Pad lithography. The main process flow of making high-voltage devices is shown in figure 2 , Involves the following process steps: 1) Preparation of Nwell: Nwell lithography in the high-voltage DMOS area and high-pressure sampling device area, phosphorus implantation, and high-temperature push to form Nwell; 2) Preparation of Pbase: Pbase lithography in part of the high-pressure sampling device area , Boron implantation, and push the junction to form Pbase; 3) Preparation of Pbody: Pbody lithography is performed on the part of th...
Embodiment approach 3
[0097] Part of the steps of the invention can also be used to produce low-voltage BJT, low-voltage CMOS, N-type and P-type capacitors, well resistors, and precise thin film resistors. Only 15 lithography plates are needed to make low-voltage devices, which are As lithography plate, Nwell lithography plate, Pwell lithography plate, Deep-N in the order of plate number + Lithography, Pbase lithography, Nchstop lithography, Pchstop lithography, Active lithography, Poly lithography, NSD lithography, PSD lithography, Omicont lithography, TiW / SiCr lithography , Metal lithography, Pad lithography. Specific process flow such as image 3 As shown, the following processes are included: 1) Growth epitaxy: NBL buried layer is grown on P-type bottom material, and then P-type epitaxy is grown; 2) Nwell is prepared: In PMOS region, N-well capacitor region, well resistance region, high voltage Nwell lithography is performed on the DMOS and sampling device areas, and phosphorus is implanted to form...
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