Oscillator circuit having frequency jitter characteristic

Abstract

The invention provides an oscillator circuit with the characteristic of frequency jitter, comprising a reference current modulating circuit and an oscillator main body circuit; wherein, the reference current modulating circuit mainly comprises a fixed resistor, a variable resistance network, a compensation capacitor and a negative feedback control loop consisting of four NMOS transistors. The oscillator main body circuit comprises two transmission gates, two capacitors, a comparator, a D trigger, two current mirror, five NMOS control transistors and two inverters. By adjusting the equivalent resistance value of the variable resistance network in a control loop periodically, the reference current is modulated into current which changes periodically and is used as charging current of the oscillator, thus generating oscillating impulse, the frequency of which changes periodically. The invention has simple implementing structure and can save the area of a chip.

Description

technical field [0001] The present application relates to an oscillator circuit with a frequency dithering characteristic. Background technique [0002] In the switching power supply, the size of peripheral devices is reduced by increasing the switching frequency. However, the increase of the switching frequency has brought some disadvantages, one of which is to increase the electromagnetic interference EMI (ELECTRO-MAGNETICInterference) of the switching power supply. If the electromagnetic interference of the switching power supply is large, it will directly affect the normal operation of the load circuit connected behind and even the entire system. Therefore, the magnitude of the electromagnetic interference noise of the switching power supply has become an important reference index to measure the performance of the switching power supply. [0003] There are large di / dt and dv / dt during the fast switching process of the switching power supply, and its switching noise ene...

AI Technical Summary

Problems solved by technology

In order to generate a sawtooth voltage with low frequency variation, the C Δu Δt = I , For the magnitude of Δu is V, the magnitude of Δt is S, if the magnitude of I is uA, the magnitude of C is uF, and the cost of realizing this magnitude of capacitance in the chip is very high, so it is required The current I of the two current sources should be small enough to make the capacitance C as small as possible, and the generation of a small enough current will also increase the chip area

Images