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Internal voltage generating circuit

A technology for generating circuits and internal voltages, applied to data processing power supplies, static memory, read-only memory, etc., can solve the problems of low utilization efficiency, circuit increase, circuit area increase, etc., to shorten the setting time and stabilize the boost voltage and the effect of boost current

Active Publication Date: 2014-01-01
PANASONIC SEMICON SOLUTIONS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0027] However, the internal voltage generating circuit 900 of the above-mentioned conventional example has the following problem: When shortening the setup time of the second charge pump circuit 909 in Phase 2, it may be necessary to increase the setup time just to shorten the setup time. Figure 11 The second boost capacitors Cb1~Cb6 shown increase the circuit with very low utilization efficiency
In addition, there is another problem that, in the case where the second boost capacitors Cb1 to Cb6 are added to shorten the setup time, the second output node N2 of the second charge pump circuit 909 needs to be used to suppress the second output voltage. The ripple smoothing capacitance of node N2, so the circuit area will increase

Method used

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no. 1 Embodiment approach

[0049]

[0050] figure 1 The configuration of the internal voltage generating circuit 100 according to the first embodiment of the present invention is shown. This internal voltage generating circuit 100 includes a first boost circuit 901 driven by a first control signal PPE1; The output node N1 outputs the first boosted voltage VPUMP1, and outputs the second boosted voltage VPUMP2 to the second output node N2 of the second booster circuit 101. 102 is a frequency division circuit (FDIV), which divides the clock signal according to the control signal FDE CLK is divided by N (N is a natural number above 2), and outputs the frequency-divided clock signal FCK; 103 is a buffer circuit (BUF), which uses one of the clock signal CLK or the frequency-divided clock signal FCK according to the control signal FDE as The clock signal SCK is output, and a clock signal XSCK complementary to the clock signal SCK is output at the same time. 104 is a second charge pump circuit, which gener...

no. 2 Embodiment approach

[0080] Figure 6 The internal voltage generating circuit 200 shown is the second embodiment, and it is different from that shown in the first embodiment. figure 1 , the difference is that: the buffer circuit 103 is controlled by a clock comparison circuit (CMP) 201, and the clock comparison circuit 201 compares the clock signal CLK and the frequency-divided clock signal FCK, and outputs a new control signal FCE. Such as Figure 7 As shown, for the clock comparison circuit 201, when the clock signal CLK and the divided clock signal FCK are both "H", the output of the arithmetic circuit 202 is "H", which is input to the clock terminal of the latch circuit 203, and will be used as data The control signal FDE (= "H") of the signal input is output through the terminal Q as a new control signal FCE. As a result, the clock signal CLK and the frequency-divided clock signal FCK are switched by the buffer circuit 103 .

[0081] Figure 8 is the timing diagram, relative to Figure ...

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Abstract

An output terminal of a first boost circuit is connected to a second boost circuit. After the second boost circuit is started up, a boost clock frequency of the second boost circuit is reduced. A time required to start up the second boost circuit is reduced, and in addition, a current supply capability of the first boost circuit is increased after the second boost circuit is started up. When the second boost circuit is driven, output voltages of the first and second boost circuits are stably supplied without instantaneously changing the output voltage of the first boost circuit.

Description

technical field [0001] The present invention relates to an internal voltage generating circuit using a booster circuit. Background technique [0002] In recent years, flash memory, which is a nonvolatile semiconductor memory device, has been required to read and rewrite data with a single power supply voltage or a low power supply voltage. Generally, a boost circuit is required to provide a boosted voltage or a negative boosted voltage on-chip when performing various operations. In addition, when CMOS processing is performed, the voltage generated by the booster circuit is used as a power supply for analog circuit characteristics improvement. [0003] Figure 9 The configuration of the internal voltage generating circuit 900 described in Patent Document 1 is shown. The internal voltage generation circuit 900 includes: a first booster circuit 901, which performs boosting operation synchronously with the clock signal CLK and the complementary clock signal XCLK, and outputs t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/06G11C11/4074G11C11/4193H02M3/07G06F1/26
CPCG11C16/30G11C5/143G11C5/145
Inventor 山平征二
Owner PANASONIC SEMICON SOLUTIONS CO LTD